245 lines
22 KiB
Plaintext
245 lines
22 KiB
Plaintext
[OutputJobFile]
|
|
Version=1.0
|
|
Caption=
|
|
Description=
|
|
VaultGUID=
|
|
ItemGUID=
|
|
ItemHRID=
|
|
RevisionGUID=
|
|
RevisionId=
|
|
VaultHRID=
|
|
AutoItemHRID=
|
|
NextRevId=
|
|
FolderGUID=
|
|
LifeCycleDefinitionGUID=
|
|
RevisionNamingSchemeGUID=
|
|
|
|
[OutputGroup1]
|
|
Name=ProductionFiles.OutJob
|
|
Description=
|
|
TargetOutputMedium=SinglePCB
|
|
VariantName=[No Variations]
|
|
VariantScope=0
|
|
CurrentConfigurationName=
|
|
TargetPrinter=Microsoft Print to PDF
|
|
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
|
|
OutputMedium1=Print Job
|
|
OutputMedium1_Type=Printer
|
|
OutputMedium1_Printer=
|
|
OutputMedium1_PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
|
|
OutputMedium2=Schematics
|
|
OutputMedium2_Type=Publish
|
|
OutputMedium3=SinglePCB
|
|
OutputMedium3_Type=GeneratedFiles
|
|
OutputMedium4=Drawings
|
|
OutputMedium4_Type=Publish
|
|
OutputMedium5=STEP
|
|
OutputMedium5_Type=GeneratedFiles
|
|
OutputType1=Gerber
|
|
OutputName1=Gerber Files
|
|
OutputCategory1=Fabrication
|
|
OutputDocumentPath1=Front_Unit_Cable_2-3.PcbDoc
|
|
OutputVariantName1=
|
|
OutputEnabled1=0
|
|
OutputEnabled1_OutputMedium1=0
|
|
OutputEnabled1_OutputMedium2=0
|
|
OutputEnabled1_OutputMedium3=0
|
|
OutputEnabled1_OutputMedium4=0
|
|
OutputEnabled1_OutputMedium5=0
|
|
OutputDefault1=0
|
|
Configuration1_Name1=OutputConfigurationParameter1
|
|
Configuration1_Item1=AddToAllLayerClasses.Set= |AddToAllPlots.Set=SerializeLayerHash.Version~2,ClassName~TPlotLayerStateArray|BoardID=RJHOKYIJ|CentrePlots=False|DrillDrawingSymbol=GraphicsSymbol|DrillDrawingSymbolSize=200000|EmbeddedApertures=True|FilmBorderSize=10000000|FilmXSize=200000000|FilmYSize=160000000|FlashAllFills=False|FlashPadShapes=True|G54OnApertureChange=False|GenerateDRCRulesFile=False|GenerateDRCRulesFile=False|GenerateReliefShapes=True|GenerateReports=True|GerberUnit=Metric|GerberUnit=Metric|IncludeUnconnectedMidLayerPads=False|LayerClassesMirror.Set= |LayerClassesPlot.Set= |LeadingAndTrailingZeroesMode=SuppressLeadingZeroes|MaxApertureSize=2500000|MergePadAndRegion=False|MinusApertureTolerance=39|MinusApertureTolerance=39|Mirror.Set=SerializeLayerHash.Version~2,ClassName~TPlotLayerStateArray|MirrorDrillDrawingPlots=False|MirrorDrillGuidePlots=False|NoRegularPolygons=False|NumberOfDecimals=3|NumberOfDecimals=3|OptimizeChangeLocationCommands=True|OptimizeChangeLocationCommands=True|OriginPosition=Relative|OutputFormat=Different|Panelize=False|Plot.Set=SerializeLayerHash.Version~2,ClassName~TPlotLayerStateArray,16973830~1,16973832~1,16973834~1,16777217~1,16842751~1,16973835~1,16973833~1,16973831~1,16908289~1,16972819~1,16972820~1,16972821~1,16972822~1|PlotBoardProfile=False|PlotBoardProfileFileName=Front_Unit_Cable_2-0.GM|PlotPositivePlaneLayers=False|PlotUsedDrillDrawingLayerPairs=False|PlotUsedDrillGuideLayerPairs=False|PlusApertureTolerance=39|PlusApertureTolerance=39|Record=GerberView|SoftwareArcs=False|Sorted=False|Sorted=False|UncheckPlotDrillDrawingLayerPair0_Backdrill=False|UncheckPlotDrillDrawingLayerPair0_Checked=False|UncheckPlotDrillDrawingLayerPair0_DrillType=Regular|UncheckPlotDrillDrawingLayerPair0_FileName=Front_Unit_Cable_2-0.GD1|UncheckPlotDrillDrawingLayerPair0_HighLayer=Bottom Layer|UncheckPlotDrillDrawingLayerPair0_LowLayer=Top Layer|UncheckPlotDrillGuideLayerPair0_Backdrill=False|UncheckPlotDrillGuideLayerPair0_Checked=False|UncheckPlotDrillGuideLayerPair0_DrillType=Regular|UncheckPlotDrillGuideLayerPair0_FileName=Front_Unit_Cable_2-0.GG1|UncheckPlotDrillGuideLayerPair0_HighLayer=Bottom Layer|UncheckPlotDrillGuideLayerPair0_LowLayer=Top Layer|UserLayerName.Caption0=Front_Unit_Cable_2-0.GBO|UserLayerName.Caption1=Front_Unit_Cable_2-0.GTP|UserLayerName.Caption10=Front_Unit_Cable_2-0.GPB|UserLayerName.Caption11=Front_Unit_Cable_2-0.GBP|UserLayerName.Caption12=Front_Unit_Cable_2-0.GM19|UserLayerName.Caption13=Front_Unit_Cable_2-0.GKO|UserLayerName.Caption14=Front_Unit_Cable_2-0.GBS|UserLayerName.Caption15=Front_Unit_Cable_2-0.GM1|UserLayerName.Caption16=Front_Unit_Cable_2-0.GBL|UserLayerName.Caption17=Front_Unit_Cable_2-0.GM51|UserLayerName.Caption18=Front_Unit_Cable_2-0.GCB1|UserLayerName.Caption19=Front_Unit_Cable_2-0.GM39|UserLayerName.Caption2=Front_Unit_Cable_2-0.GTO|UserLayerName.Caption20=Front_Unit_Cable_2-0.GCB2|UserLayerName.Caption21=Front_Unit_Cable_2-0.GTL|UserLayerName.Caption22=Front_Unit_Cable_2-0.GM63|UserLayerName.Caption23=Front_Unit_Cable_2-0.GCT3|UserLayerName.Caption3=Front_Unit_Cable_2-0.GTS|UserLayerName.Caption4=Front_Unit_Cable_2-0.GM40|UserLayerName.Caption5=Front_Unit_Cable_2-0.GM46|UserLayerName.Caption6=Front_Unit_Cable_2-0.GM52|UserLayerName.Caption7=Front_Unit_Cable_2-0.GM64|UserLayerName.Caption8=Front_Unit_Cable_2-0.GCT2|UserLayerName.Caption9=Front_Unit_Cable_2-0.GPT|UserLayerName.Count=24|UserLayerName.Layer0=16973831|UserLayerName.Layer1=16973832|UserLayerName.Layer10=16973849|UserLayerName.Layer11=16973833|UserLayerName.Layer12=16908307|UserLayerName.Layer13=16973837|UserLayerName.Layer14=16973835|UserLayerName.Layer15=16908289|UserLayerName.Layer16=16842751|UserLayerName.Layer17=16908339|UserLayerName.Layer18=16972819|UserLayerName.Layer19=16908327|UserLayerName.Layer2=16973830|UserLayerName.Layer20=16972821|UserLayerName.Layer21=16777217|UserLayerName.Layer22=16908351|UserLayerName.Layer23=16972822|UserLayerName.Layer3=16973834|UserLayerName.Layer4=16908328|UserLayerName.Layer5=16908334|UserLayerName.Layer6=16908340|UserLayerName.Layer7=16908352|UserLayerName.Layer8=16972820|UserLayerName.Layer9=16973848|DocumentPath=C:\Users\Public\Documents\Altium\Front_Unit_Cable_2-1\Front_Unit_Cable_2-1.PcbDoc
|
|
OutputType2=ExportSTEP
|
|
OutputName2=Export STEP
|
|
OutputCategory2=Export
|
|
OutputDocumentPath2=Front_Unit_Cable_2-3.PcbDoc
|
|
OutputVariantName2=
|
|
OutputEnabled2=0
|
|
OutputEnabled2_OutputMedium1=0
|
|
OutputEnabled2_OutputMedium2=0
|
|
OutputEnabled2_OutputMedium3=0
|
|
OutputEnabled2_OutputMedium4=0
|
|
OutputEnabled2_OutputMedium5=1
|
|
OutputDefault2=0
|
|
Configuration2_Name1=OutputConfigurationParameter1
|
|
Configuration2_Item1=Record=ExportSTEPView|ExportComponentOptions=0|ExportModelsOption=0|ExportHolesOption=0|CanSelectPrimitives=False|IncludeMechanicalPadHoles=True|IncludeElectricalPadHoles=True|IncludeFreePadHoles=True|ExportFoldedBoard=True|ExportFoldedBoardRate=100|ComponentSuffixType=0|ComponentSuffix= |ExportCopperOption=0|ExportCopperLayer=0|ExportPadAndViaBarrelsOnly=False|IgnoreBoardCopperLayerColors=False|ExportAsSinglePart=False|IncludeCoverLayer=True|SkipFreeBodies=False|SkipHidden=False|DocumentPath=C:\Users\Public\Documents\Altium\Frontunit_Cable_2-0\Front_Unit_Cable_2-0.PcbDoc
|
|
OutputType3=ODB
|
|
OutputName3=ODB++ Files
|
|
OutputCategory3=Fabrication
|
|
OutputDocumentPath3=Front_Unit_Cable_2-3.PcbDoc
|
|
OutputVariantName3=
|
|
OutputEnabled3=0
|
|
OutputEnabled3_OutputMedium1=0
|
|
OutputEnabled3_OutputMedium2=0
|
|
OutputEnabled3_OutputMedium3=0
|
|
OutputEnabled3_OutputMedium4=0
|
|
OutputEnabled3_OutputMedium5=0
|
|
OutputDefault3=0
|
|
Configuration3_Name1=OutputConfigurationParameter1
|
|
Configuration3_Item1=AddLayersToGroup.Group_0=3|AddLayersToGroup.Set_0=16972819,16972820,16972821,16972822|AddLayersToGroups.Count=1|Compression_None=False|Compression_tar_tgz=False|Compression_zip=True|DifferentFootprints=False|ExportPositivePlaneLayers=False|GenerateDRCRulesFile=False|IncludeUnconnectedMidLayerPads=False|IncludeVariantsData=False|MergeNetTieNets=False|ObjsInsideBoardOutlineOnly=False|ODBProfileLayer=-1000|ODBProfileLayerV7=-1|Plot_V7_1=True|Plot_V7_1_name=Bottom Coverlay Outline Layer 1|Plot_V7_2=True|Plot_V7_2_name=Top Coverlay Outline Layer 2|Plot_V7_3=True|Plot_V7_3_name=Bottom Coverlay Outline Layer 2|Plot_V7_4=True|Plot_V7_4_name=Top Coverlay Outline Layer 3|PlotBackDrillingPairs=False|PlotBlindViasPairs=False|PlotBottomLayerPlot=True|PlotBottomOverlayPlot=True|PlotBottomPastePlot=True|PlotBottomSolderPlot=True|PlotCounterHolesPairs=False|PlotDrillDrawingPair0_DrillType=Regular|PlotDrillDrawingPair0_HighLayer=Bottom Layer|PlotDrillDrawingPair0_LowLayer=Top Layer|PlotDrillDrawingPair0_Plot=False|PlotDrillDrawingPairs=False|PlotDrillGuidePair0_DrillType=Regular|PlotDrillGuidePair0_HighLayer=Bottom Layer|PlotDrillGuidePair0_LowLayer=Top Layer|PlotDrillGuidePair0_Plot=False|PlotDrillGuidePairs=False|PlotInternalPlane10Plot=False|PlotInternalPlane11Plot=False|PlotInternalPlane12Plot=False|PlotInternalPlane13Plot=False|PlotInternalPlane14Plot=False|PlotInternalPlane15Plot=False|PlotInternalPlane16Plot=False|PlotInternalPlane1Plot=False|PlotInternalPlane2Plot=False|PlotInternalPlane3Plot=False|PlotInternalPlane4Plot=False|PlotInternalPlane5Plot=False|PlotInternalPlane6Plot=False|PlotInternalPlane7Plot=False|PlotInternalPlane8Plot=False|PlotInternalPlane9Plot=False|PlotKeepOutLayerPlot=False|PlotMechanical10Plot=False|PlotMechanical11Plot=False|PlotMechanical12Plot=False|PlotMechanical13Plot=False|PlotMechanical14Plot=False|PlotMechanical15Plot=False|PlotMechanical16Plot=False|PlotMechanical1Plot=True|PlotMechanical2Plot=False|PlotMechanical3Plot=False|PlotMechanical4Plot=False|PlotMechanical5Plot=False|PlotMechanical6Plot=False|PlotMechanical7Plot=False|PlotMechanical8Plot=False|PlotMechanical9Plot=False|PlotMicroViasPairs=False|PlotMidLayer10Plot=False|PlotMidLayer11Plot=False|PlotMidLayer12Plot=False|PlotMidLayer13Plot=False|PlotMidLayer14Plot=False|PlotMidLayer15Plot=False|PlotMidLayer16Plot=False|PlotMidLayer17Plot=False|PlotMidLayer18Plot=False|PlotMidLayer19Plot=False|PlotMidLayer1Plot=False|PlotMidLayer20Plot=False|PlotMidLayer21Plot=False|PlotMidLayer22Plot=False|PlotMidLayer23Plot=False|PlotMidLayer24Plot=False|PlotMidLayer25Plot=False|PlotMidLayer26Plot=False|PlotMidLayer27Plot=False|PlotMidLayer28Plot=False|PlotMidLayer29Plot=False|PlotMidLayer2Plot=False|PlotMidLayer30Plot=False|PlotMidLayer3Plot=False|PlotMidLayer4Plot=False|PlotMidLayer5Plot=False|PlotMidLayer6Plot=False|PlotMidLayer7Plot=False|PlotMidLayer8Plot=False|PlotMidLayer9Plot=False|PlotNPTHPair0_DrillType=Regular|PlotNPTHPair0_HighLayer=Top Layer|PlotNPTHPair0_LowLayer=Bottom Layer|PlotNPTHPair0_Plot=True|PlotNPTHPairs=False|PlotPTHPair0_DrillType=Regular|PlotPTHPair0_HighLayer=Top Layer|PlotPTHPair0_LowLayer=Bottom Layer|PlotPTHPair0_Plot=True|PlotPTHPairs=False|PlotTopLayerPlot=True|PlotTopOverlayPlot=True|PlotTopPastePlot=True|PlotTopSolderPlot=True|PlotViaTypeDrillDrawingPair0_DrillType=Regular|PlotViaTypeDrillDrawingPair0_HighLayer=Top Layer|PlotViaTypeDrillDrawingPair0_LowLayer=Bottom Layer|PlotViaTypeDrillDrawingPair0_Name= |PlotViaTypeDrillDrawingPair0_Plot=False|PlotViaTypeDrillDrawingPair0_ViaStructureType=7|PlotViaTypeDrillDrawingPairs=False|PlotViaTypeDrillGuidePair0_DrillType=Regular|PlotViaTypeDrillGuidePair0_HighLayer=Top Layer|PlotViaTypeDrillGuidePair0_LowLayer=Bottom Layer|PlotViaTypeDrillGuidePair0_Name= |PlotViaTypeDrillGuidePair0_Plot=False|PlotViaTypeDrillGuidePair0_ViaStructureType=7|PlotViaTypeDrillGuidePairs=False|PlotViaTypeDrillPair0_DrillType=Regular|PlotViaTypeDrillPair0_HighLayer=Top Layer|PlotViaTypeDrillPair0_LowLayer=Bottom Layer|PlotViaTypeDrillPair0_Name= |PlotViaTypeDrillPair0_Plot=True|PlotViaTypeDrillPair0_ViaStructureType=7|PlotViaTypeDrillPairs=False|Record=ODBView|ToolsByDrillSymbols=False|Units=Metric|UserLayerName.Caption0=flex_top_coverlay|UserLayerName.Caption1=flex+bottom-stiffener_top_coverlay_mask|UserLayerName.Caption2=flex_bottom_coverlay|UserLayerName.Caption3=flex+top-stiffener_bottom_coverlay|UserLayerName.Caption4=flex+top-stiffener_bottom_coverlay_mask|UserLayerName.Caption5=flex+bottom-stiffener_top_coverlay|UserLayerName.Count=6|UserLayerName.Layer0=16972820|UserLayerName.Layer1=16973834|UserLayerName.Layer2=16972821|UserLayerName.Layer3=16972819|UserLayerName.Layer4=16973835|UserLayerName.Layer5=16972822|DocumentPath=C:\Users\Public\Documents\Altium\Front_Unit_Cable_2-1\Front_Unit_Cable_2-1.PcbDoc
|
|
OutputType4=Schematic Print
|
|
OutputName4=Schematic Prints
|
|
OutputCategory4=Documentation
|
|
OutputDocumentPath4=[Project Physical Documents]
|
|
OutputVariantName4=A
|
|
OutputEnabled4=0
|
|
OutputEnabled4_OutputMedium1=0
|
|
OutputEnabled4_OutputMedium2=1
|
|
OutputEnabled4_OutputMedium3=0
|
|
OutputEnabled4_OutputMedium4=0
|
|
OutputEnabled4_OutputMedium5=0
|
|
OutputDefault4=0
|
|
PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=0|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
|
|
Configuration4_Name1=OutputConfigurationParameter1
|
|
Configuration4_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0|DocumentPath=All SCH Documents
|
|
OutputType5=PCBDrawing
|
|
OutputName5=Draftsman
|
|
OutputCategory5=Documentation
|
|
OutputDocumentPath5=Front_Unit_Cable_2-3.PCBDwf
|
|
OutputVariantName5=A
|
|
OutputEnabled5=0
|
|
OutputEnabled5_OutputMedium1=0
|
|
OutputEnabled5_OutputMedium2=0
|
|
OutputEnabled5_OutputMedium3=0
|
|
OutputEnabled5_OutputMedium4=1
|
|
OutputEnabled5_OutputMedium5=0
|
|
OutputDefault5=0
|
|
PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
|
|
OutputType6=NC Drill
|
|
OutputName6=NC Drill Files
|
|
OutputCategory6=Fabrication
|
|
OutputDocumentPath6=Front_Unit_Cable_2-3.PcbDoc
|
|
OutputVariantName6=
|
|
OutputEnabled6=0
|
|
OutputEnabled6_OutputMedium1=0
|
|
OutputEnabled6_OutputMedium2=0
|
|
OutputEnabled6_OutputMedium3=0
|
|
OutputEnabled6_OutputMedium4=0
|
|
OutputEnabled6_OutputMedium5=0
|
|
OutputDefault6=0
|
|
Configuration6_Name1=OutputConfigurationParameter1
|
|
Configuration6_Item1=BoardEdgeRoutToolDia=2000000|GenerateBoardEdgeRout=False|GenerateDrilledSlotsG85=False|GenerateEIADrillFile=False|GenerateSeparatePlatedNonPlatedFiles=True|GenerateSeparateViaTypeFiles=True|NumberOfDecimals=4|NumberOfUnits=4|OptimizeChangeLocationCommands=True|OriginPosition=Relative|Record=DrillView|Units=Metric|ZeroesMode=KeepLeadingAndTrailingZeroes|DocumentPath=C:\Users\Public\Documents\Altium\Frontunit_Cable\63-00032_Frontunit_Cable_1-0.PcbDoc
|
|
OutputType7=Gerber X2
|
|
OutputName7=Gerber X2 Files
|
|
OutputCategory7=Fabrication
|
|
OutputDocumentPath7=Front_Unit_Cable_2-3.PcbDoc
|
|
OutputVariantName7=
|
|
OutputEnabled7=1
|
|
OutputEnabled7_OutputMedium1=0
|
|
OutputEnabled7_OutputMedium2=0
|
|
OutputEnabled7_OutputMedium3=1
|
|
OutputEnabled7_OutputMedium4=0
|
|
OutputEnabled7_OutputMedium5=0
|
|
OutputDefault7=0
|
|
Configuration7_Name1=OutputConfigurationParameter1
|
|
Configuration7_Item1=BoardID=RJHOKYIJ|FileComment= |FileSubject=Autodetect|GenerateDRCRulesFile=True|GenerateReports=True|GerberUnit=Metric|IncludeUnconnectedMidLayerPads=True|MergePadAndRegion=False|MinusApertureTolerance=39|NumberOfDecimals=5|OptimizeChangeLocationCommands=True|OutputFormat=Single|PlotBackDrillingPairs=False|PlotBlindViasPair0_Backdrill=False|PlotBlindViasPair0_Checked=True|PlotBlindViasPair0_DrillType=Regular|PlotBlindViasPair0_FileName= |PlotBlindViasPair0_HighLayer=Mid Layer 2|PlotBlindViasPair0_LowLayer=Mid Layer 1|PlotBlindViasPairs=False|PlotBoardProfile=True|PlotBoardProfileFileName=Front_Unit_Cable_2-0_Profile.gbr|PlotCounterHolesPairs=False|PlotDrillDrawingPairs=False|PlotDrillGuidePairs=False|PlotMicroViasPairs=False|PlotNPTHPair0_Backdrill=False|PlotNPTHPair0_Checked=True|PlotNPTHPair0_DrillType=Regular|PlotNPTHPair0_FileName= |PlotNPTHPair0_HighLayer=Top Layer|PlotNPTHPair0_LowLayer=Bottom Layer|PlotNPTHPairs=False|PlotPTHPair0_Backdrill=False|PlotPTHPair0_Checked=True|PlotPTHPair0_DrillType=Regular|PlotPTHPair0_FileName= |PlotPTHPair0_HighLayer=Top Layer|PlotPTHPair0_LowLayer=Bottom Layer|PlotPTHPairs=False|PlotViaTypeDrillDrawingPairs=False|PlotViaTypeDrillGuidePairs=False|PlotViaTypeDrillPairs=False|PlotX2.Set=SerializeLayerHash.Version~2,ClassName~TPlotLayerStateArray,16777217~1,16908290~1,16973833~1,16908296~1,16908289~1,16777219~1,16973831~1,16908294~1,16973835~1,16973830~1,16973832~1,16842751~1,16973834~1,16777218~1,16908379~1,16908380~1,16972821~1,16972819~1,16972820~1,16972822~1|PlusApertureTolerance=39|Record=GerberX2View|Sorted=False|UncheckPlotDrillDrawingPair0_Backdrill=False|UncheckPlotDrillDrawingPair0_Checked=False|UncheckPlotDrillDrawingPair0_DrillType=Regular|UncheckPlotDrillDrawingPair0_FileName=Front_Unit_Cable_2-0_Drawing_1.gbr|UncheckPlotDrillDrawingPair0_HighLayer=Bottom Layer|UncheckPlotDrillDrawingPair0_LowLayer=Top Layer|UncheckPlotDrillGuidePair0_Backdrill=False|UncheckPlotDrillGuidePair0_Checked=False|UncheckPlotDrillGuidePair0_DrillType=Regular|UncheckPlotDrillGuidePair0_FileName=Front_Unit_Cable_2-0_Drillmap_1.gbr|UncheckPlotDrillGuidePair0_HighLayer=Bottom Layer|UncheckPlotDrillGuidePair0_LowLayer=Top Layer|UserLayerName.Caption0=Front_Unit_Cable_2-0_Legend_Bot.gbr|UserLayerName.Caption1=Front_Unit_Cable_2-0_Paste_Top.gbr|UserLayerName.Caption10=Front_Unit_Cable_2-0_Flex+Bot-Stiffener_Coverlay_Top.gbr|UserLayerName.Caption11=Front_Unit_Cable_2-0_Pads_Bot.gbr|UserLayerName.Caption12=Front_Unit_Cable_2-0_Fab_Notes.gbr|UserLayerName.Caption13=Front_Unit_Cable_2-0_Paste_Bot.gbr|UserLayerName.Caption14=Front_Unit_Cable_2-0_Soldermask_Bot.gbr|UserLayerName.Caption15=Front_Unit_Cable_2-0_Board_Shape.gbr|UserLayerName.Caption16=Front_Unit_Cable_2-0_Copper_Signal_Bot.gbr|UserLayerName.Caption17=Front_Unit_Cable_2-0_Top_Assembly.gbr|UserLayerName.Caption18=Front_Unit_Cable_2-0_Flex+Top-Stiffener_Coverlay_Bot.gbr|UserLayerName.Caption19=Front_Unit_Cable_2-0_Top_Courtyard.gbr|UserLayerName.Caption2=Front_Unit_Cable_2-0_Legend_Top.gbr|UserLayerName.Caption20=Front_Unit_Cable_2-0_Flex_Coverlay_Bot.gbr|UserLayerName.Caption21=Front_Unit_Cable_2-0_Copper_Signal_Top.gbr|UserLayerName.Caption22=Front_Unit_Cable_2-0_Top_3D_Body.gbr|UserLayerName.Caption23=Front_Unit_Cable_2-0_Keep-out.gbr|UserLayerName.Caption3=Front_Unit_Cable_2-0_Soldermask_Top.gbr|UserLayerName.Caption4=Front_Unit_Cable_2-0_Bottom_Courtyard.gbr|UserLayerName.Caption5=Front_Unit_Cable_2-0_Route_Tool_Path.gbr|UserLayerName.Caption6=Front_Unit_Cable_2-0_Bottom_Assembly.gbr|UserLayerName.Caption7=Front_Unit_Cable_2-0_Bottom_3D_Body.gbr|UserLayerName.Caption8=Front_Unit_Cable_2-0_Flex_Coverlay_Top.gbr|UserLayerName.Caption9=Front_Unit_Cable_2-0_Pads_Top.gbr|UserLayerName.Count=24|UserLayerName.Layer0=16973831|UserLayerName.Layer1=16973832|UserLayerName.Layer10=16972822|UserLayerName.Layer11=16973849|UserLayerName.Layer12=16908307|UserLayerName.Layer13=16973833|UserLayerName.Layer14=16973835|UserLayerName.Layer15=16908289|UserLayerName.Layer16=16842751|UserLayerName.Layer17=16908339|UserLayerName.Layer18=16972819|UserLayerName.Layer19=16908327|UserLayerName.Layer2=16973830|UserLayerName.Layer20=16972821|UserLayerName.Layer21=16777217|UserLayerName.Layer22=16908351|UserLayerName.Layer23=16973837|UserLayerName.Layer3=16973834|UserLayerName.Layer4=16908328|UserLayerName.Layer5=16908334|UserLayerName.Layer6=16908340|UserLayerName.Layer7=16908352|UserLayerName.Layer8=16972820|UserLayerName.Layer9=16973848|DocumentPath=C:\Users\Public\Documents\Altium\Front_Unit_Cable_2-1\Front_Unit_Cable_2-1.PcbDoc
|
|
|
|
[PublishSettings]
|
|
OutputFilePath2=C:\GIT\Worldcoin\electronics\battery\hardware_Altium\63-00013_Battery_PCB\Project Outputs for 63-00013_Battery_PCB_6.3\PDF\Schematics.PDF
|
|
ReleaseManaged2=1
|
|
OutputBasePath2=Project Outputs
|
|
OutputPathMedia2=[Media Type]
|
|
OutputPathMediaValue2=
|
|
OutputPathOutputer2=[Output Type]
|
|
OutputPathOutputerPrefix2=
|
|
OutputPathOutputerValue2=
|
|
OutputFileName2=Schematics.PDF
|
|
OutputFileNameMulti2=
|
|
UseOutputNameForMulti2=0
|
|
OutputFileNameSpecial2=
|
|
OpenOutput2=0
|
|
PromptOverwrite2=0
|
|
PublishMethod2=0
|
|
ZoomLevel2=50
|
|
FitSCHPrintSizeToDoc2=1
|
|
FitPCBPrintSizeToDoc2=1
|
|
GenerateNetsInfo2=1
|
|
MarkPins2=1
|
|
MarkNetLabels2=1
|
|
MarkPortsId2=1
|
|
GenerateTOC2=1
|
|
ShowComponentParameters2=1
|
|
GlobalBookmarks2=0
|
|
PDFACompliance2=Disabled
|
|
PDFVersion2=Default
|
|
OutputFilePath3=C:\Users\Public\Documents\Altium\Frontunit_Cable\Project Outputs\SinglePCB\
|
|
ReleaseManaged3=1
|
|
OutputBasePath3=Project Outputs
|
|
OutputPathMedia3=[Media Name]
|
|
OutputPathMediaValue3=
|
|
OutputPathOutputer3=[Output Type]
|
|
OutputPathOutputerPrefix3=
|
|
OutputPathOutputerValue3=
|
|
OutputFileName3=
|
|
OutputFileNameMulti3=blub
|
|
UseOutputNameForMulti3=1
|
|
OutputFileNameSpecial3=
|
|
OpenOutput3=0
|
|
OutputFilePath4=C:\GIT\Worldcoin\electronics\battery\hardware_Altium\63-00013_Battery_PCB\Project Outputs for 63-00013_Battery_PCB_6.3\PDF\Drawings.PDF
|
|
ReleaseManaged4=1
|
|
OutputBasePath4=Project Outputs
|
|
OutputPathMedia4=[Media Type]
|
|
OutputPathMediaValue4=
|
|
OutputPathOutputer4=[Output Type]
|
|
OutputPathOutputerPrefix4=
|
|
OutputPathOutputerValue4=
|
|
OutputFileName4=Drawings.PDF
|
|
OutputFileNameMulti4=
|
|
UseOutputNameForMulti4=0
|
|
OutputFileNameSpecial4=
|
|
OpenOutput4=0
|
|
PromptOverwrite4=0
|
|
PublishMethod4=0
|
|
ZoomLevel4=50
|
|
FitSCHPrintSizeToDoc4=1
|
|
FitPCBPrintSizeToDoc4=1
|
|
GenerateNetsInfo4=1
|
|
MarkPins4=1
|
|
MarkNetLabels4=1
|
|
MarkPortsId4=1
|
|
GenerateTOC4=1
|
|
ShowComponentParameters4=1
|
|
GlobalBookmarks4=0
|
|
PDFACompliance4=Disabled
|
|
PDFVersion4=Default
|
|
OutputFilePath5=C:\Users\Public\Documents\Altium\Front_Unit_Cable_2-1\Project Outputs\STEP_complex\
|
|
ReleaseManaged5=1
|
|
OutputBasePath5=Project Outputs
|
|
OutputPathMedia5=STEP_complex
|
|
OutputPathMediaValue5=STEP_complex
|
|
OutputPathOutputer5=
|
|
OutputPathOutputerPrefix5=
|
|
OutputPathOutputerValue5=STEP_complex
|
|
OutputFileName5=
|
|
OutputFileNameMulti5=
|
|
UseOutputNameForMulti5=1
|
|
OutputFileNameSpecial5=
|
|
OpenOutput5=0
|
|
|
|
[GeneratedFilesSettings]
|
|
RelativeOutputPath2=C:\GIT\Worldcoin\electronics\battery\hardware_Altium\63-00013_Battery_PCB\Project Outputs for 63-00013_Battery_PCB_6.3\PDF\Schematics.PDF
|
|
OpenOutputs2=0
|
|
RelativeOutputPath3=C:\Users\Public\Documents\Altium\Frontunit_Cable\Project Outputs\SinglePCB\
|
|
OpenOutputs3=0
|
|
AddToProject3=1
|
|
TimestampFolder3=0
|
|
UseOutputName3=0
|
|
OpenODBOutput3=0
|
|
OpenGerberOutput3=0
|
|
OpenNCDrillOutput3=0
|
|
OpenIPCOutput3=0
|
|
EnableReload3=0
|
|
RelativeOutputPath4=C:\GIT\Worldcoin\electronics\battery\hardware_Altium\63-00013_Battery_PCB\Project Outputs for 63-00013_Battery_PCB_6.3\PDF\Drawings.PDF
|
|
OpenOutputs4=0
|
|
RelativeOutputPath5=C:\Users\Public\Documents\Altium\Front_Unit_Cable_2-1\Project Outputs\STEP_complex\
|
|
OpenOutputs5=0
|
|
AddToProject5=1
|
|
TimestampFolder5=0
|
|
UseOutputName5=0
|
|
OpenODBOutput5=0
|
|
OpenGerberOutput5=0
|
|
OpenNCDrillOutput5=0
|
|
OpenIPCOutput5=0
|
|
EnableReload5=0
|
|
|