forked from AllSpiceMirrors/uob-hep-pc072
13 lines
343 B
VHDL
13 lines
343 B
VHDL
-- generated by newgenasym Mon May 21 10:35:03 2012
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity \usblc6-2\ is
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port (
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GND: IN STD_LOGIC;
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\i/o1\: INOUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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\i/o2\: INOUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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VBUS: IN STD_LOGIC);
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end \usblc6-2\;
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