68 lines
1.1 KiB
Plaintext
68 lines
1.1 KiB
Plaintext
# ---> Cadence
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# .gitignore for Cadence OrCAD, HDL Allegro, and System Capture projects
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# Website: https://www.cadence.com/
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### Cadence ###
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## Schematic
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# schematic design lock file
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*.DSNlck
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# design backup archive
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*.DBK
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## PCB
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# pcb design lock file
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*.brd.lck
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# generated autorouter metadata
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*.did
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# local backup file
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AUTOSAVE.brd
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*.SAV
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last_import_time.txt
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# generated journal files
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*.jrl
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# generated error log file
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*.dmp
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## General
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*.log
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# generated metadata file
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*_convert.txt
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# project lock file
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*.OLBlck
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# ultralibrarian generated documentation
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ImportGuide.html
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# generated orcad file, including which file was last opened
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master.tag
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# ---> KiCad
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# For PCBs designed using KiCad: https://www.kicad.org/
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# Format documentation: https://kicad.org/help/file-formats/
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# Temporary files
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*.000
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*.bak
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*.bck
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*.kicad_pcb-bak
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*.kicad_sch-bak
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*-backups
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*.kicad_prl
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*.sch-bak
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*~
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_autosave-*
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*.tmp
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*-save.pro
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*-save.kicad_pcb
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fp-info-cache
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# Netlist files (exported from Eeschema)
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*.net
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# Autorouter files (exported from Pcbnew)
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*.dsn
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*.ses
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# Exported BOM files
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*.xml
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*.csv
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