develop

bdwaj commented

2026-04-04 20:57:48 +00:00

First-time contributor

Resolved Issues

Include any relevant issues closed by this pull request. Use the form "Closes #"
...

Description

Include a description for this design review. What is the primary purpose? What will be the status of this design after approval?
...

Design Review Checklist

Process

Schematic and PCB file names follow standard
Export necessary review files (3D model, BOM, etc.)
Update relevant system architecture documents
Update project README page
Simulations uploaded and outputs explained

System

Power
- Sufficient power supplied from upstream source
- Supply rated for necessary country specifications
- Estimated total worst-case power supply draw
Connectors
- I/Os are specified
- Sufficient Current and Voltage rating
- Mating connectors have matching pinout
- Same contact material specified for mating connectors
Testing
- Test procedure written
Environmental
- Specified min/max operating temperature
- Specified min/max storage temperature
- Specified min/max humidity
ROHS compliance requirement review

Components

Unpopulated components are denoted DNI
Components meet environmental specifications
All components have quantity, reference designator and description
Suggested and alternate manufacturers listed
Price and stock checked for each component
Component derating
- Voltage
- Current
- Power at worst-case operating temperature
- Temperature at worst-case power

Schematics

Document
- Dot on each connection
- No four-point connections
- Title block completed for each sheet
- All components have reference designators and values
- Multi-part components don't have unplaced symbols
- Page title present and consistent on all pages if not in title block
- Symbols identify open collector/drain pins and internal pulled up/down pins
- Pin names and attributes on symbols with multi-function pins should match actual design usage (I/O/Bi, Name)
- Components follow preferred reference designator pattern

PCB

Manufacturing
- PCB manufacturing requirements noted on fab layer
  - Plating specified
    - Plating material
    - Plating thickness
  - Layer stack-up specified
  - Minimum trace/space specified
  - Minimum hole size specified
  - PCB color specified
  - Silkscreen color specified
  - Controlled impedance specified
  - Blind or buried vias specified
  - Panelization specified
    - External routing specified (ex. v-groove vs route)
  - Drill table generated
  - All specifications exceed manufacturing tolerance

## Resolved Issues Include any relevant issues closed by this pull request. Use the form "Closes #<number of issue>" ... ## Description Include a description for this design review. What is the primary purpose? What will be the status of this design after approval? ... ## Design Review Checklist ### Process - [x] Schematic and PCB file names follow standard - [x] Export necessary review files (3D model, BOM, etc.) - [ ] Update relevant system architecture documents - [ ] Update project README page - [ ] Simulations uploaded and outputs explained ### System - [x] Power - [x] Sufficient power supplied from upstream source - [x] Supply rated for necessary country specifications - [x] Estimated total worst-case power supply draw - [ ] Connectors - [ ] I/Os are specified - [ ] Sufficient Current and Voltage rating - [ ] Mating connectors have matching pinout - [ ] Same contact material specified for mating connectors - [ ] Testing - [ ] Test procedure written - [ ] Environmental - [ ] Specified min/max operating temperature - [ ] Specified min/max storage temperature - [ ] Specified min/max humidity - [ ] ROHS compliance requirement review ### Components - [x] Unpopulated components are denoted DNI - [x] Components meet environmental specifications - [x] All components have quantity, reference designator and description - [x] Suggested and alternate manufacturers listed - [ ] Price and stock checked for each component - [ ] Component derating - [ ] Voltage - [ ] Current - [ ] Power at worst-case operating temperature - [ ] Temperature at worst-case power ### Schematics - [x] Document - [x] Dot on each connection - [x] No four-point connections - [x] Title block completed for each sheet - [x] All components have reference designators and values - [x] Multi-part components don't have unplaced symbols - [x] Page title present and consistent on all pages if not in title block - [x] Symbols identify open collector/drain pins and internal pulled up/down pins - [x] Pin names and attributes on symbols with multi-function pins should match actual design usage (I/O/Bi, Name) - [ ] Components follow preferred reference designator pattern  ### PCB - [ ] Manufacturing - [ ] PCB manufacturing requirements noted on `fab` layer - [ ] Plating specified - [ ] Plating material - [ ] Plating thickness - [ ] Layer stack-up specified - [ ] Minimum trace/space specified - [ ] Minimum hole size specified - [ ] PCB color specified - [ ] Silkscreen color specified - [ ] Controlled impedance specified - [ ] Blind or buried vias specified - [ ] Panelization specified - [ ] External routing specified (ex. v-groove vs route) - [ ] Drill table generated - [ ] All specifications exceed manufacturing tolerance

bdwaj added 11 commits 2026-04-04 20:57:48 +00:00

replacements and component re-positioning f0c6d1baba

Add strap to bootloader GND 81691ffcc0

Fix bootloader pull-up 74c95e39e8

Decouple SCLK from comparator. Add PWR HDR 02cade736c

Remove xtal testpoints 5fd194e565

Remove debug header e2e419c724

Add reset switch 4d8a762fe0

Fix J3 footprint silkscreen for placement ab99ea7c40

Update J3 silkscreen 1ad1cc6d80

Fix J3 and J1 silkscreens a3c822e27c

Bootloader Capacitor 100n - 200n. Power Voltage not 5V, changed to 3.3V 56ae9065b0

bdwaj requested review from DRCY 2026-04-04 21:22:58 +00:00

bdwaj added 1 commit 2026-04-04 21:29:54 +00:00

revert 56ae9065b0150083be87f14c29e17c3db4c3fe78 1e4c475e55

revert Bootloader Capacitor 100n - 200n. Power Voltage not 5V, changed to 3.3V

bdwaj closed this design review

2026-04-04 21:32:39 +00:00

Design review closed

Please reopen this design review to perform a merge.

develop #11