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220 lines
7.3 KiB
Markdown
220 lines
7.3 KiB
Markdown
# CleverHand — Hardware
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This repository contains the **hardware implementation** of the CleverHand platform.
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CleverHand is an open-source, modular **Human–Machine Interface (HMI) platform** designed for
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research, education, and rapid prototyping in neurotechnology, robotics, and human–robot interaction.
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The hardware repository provides:
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* modular PCB designs (KiCad),
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* mechanical integration assets,
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* manufacturing outputs,
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* and per-module documentation and quality metadata.
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> This repository focuses **only on hardware**.
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> Firmware, software, tools, and platform-level documentation live in sibling repositories.
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---
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## Position in the CleverHand platform
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CleverHand is structured as a **hardware / firmware / software stack**:
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* **Hardware** (this repo)
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Modular, chainable PCBs for sensing, actuation, and interfacing with the human body.
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* **Firmware**
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Low-level drivers, bus control, synchronization, and data transport.
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* **Software & SDKs**
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Host interfaces (GUI, Python, C++, LSL, ROS, etc.).
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This separation allows:
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* independent evolution of hardware and software,
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* reproducible research setups,
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* and multiple integration paths (DIY, PCBA, pre-assembled).
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---
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## Intended use & scope
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CleverHand hardware is designed for:
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* research experiments,
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* educational use,
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* prototyping of assistive and interactive systems.
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It is **not**:
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* a medical device,
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* a certified clinical system,
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* a consumer product.
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All designs are provided **as-is**, with readiness and quality explicitly documented per module.
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---
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## Design goals & constraints
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| Constraint | Status | Notes |
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| ------------------- | :----: | ---------------------------- |
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| Wearable | ⚒️ | Wireless support in progress |
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| ≥16 channels | ✅ | Up to 256 channels (32 × 8) |
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| ≥2 kHz bandwidth | ✅ | Up to 2.5 kHz |
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| ≥16-bit resolution | ✅ | Up to 24-bit |
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| Bipolar / monopolar | ✅ | Module-dependent |
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| Modular | ✅ | 1–32 modules per bus |
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| Affordable | ✅ | ~£10–£30 per module |
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| Open-source | ✅ | Hardware, firmware, software |
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---
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## Hardware architecture overview
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The hardware platform is built around a **chainable modular architecture**.
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Each CleverHand system is composed of:
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* a **controller** (host interface and timing),
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* one **communication module** (bus arbitration),
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* one or more **HMI modules**, assembled from submodules.
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### Submodule types
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HMI nodes are built by stacking standardized submodules:
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* **Communication submodule**
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Address decoding, bus routing, chip-select handling.
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* **Sensor submodule**
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Biosignal or motion acquisition (EMG, IMU, etc.).
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* **Feedback submodule**
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User feedback (vibration, electrotactile stimulation, LEDs).
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* **Interface submodule**
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Physical interface to the body (dry electrodes, jack, flex PCB).
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This structure allows:
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* rapid reconfiguration,
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* high channel density,
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* reuse of validated building blocks.
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---
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## Module catalog (hardware)
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> The table below lists **implemented hardware designs**.
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> Readiness (prototype / reference) and quality status are tracked via
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> `description.yaml`, QC artifacts, and the generated catalog — not inferred from this table.
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| Module | Description | Image | Documentation |
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| ----------------------- | -------------------------------------- | -------------------------------------------------------------------------- | -------------------------------------------------------- |
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| Communication (COM_MOD) | Bus communication and address decoding |  | [README](pcb/hmi/communication/COM_MOD/README.md) |
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| EMG ADS1293 | 5-channel EMG acquisition |  | [README](pcb/hmi/submodule/sensor/EMG_DAQ_ADS1293/README.md) |
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| EMG ADS1298 | 8-channel EMG acquisition |  | [README](pcb/hmi/submodule/sensor/EMG_DAQ_ADS1298/README.md) |
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| EMG INA331 | Single-channel EMG + IMU |  | [README](pcb/hmi/submodule/sensor/EMG_INA331/README.md) |
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| FES AO4882 | Electrotactile stimulation |  | [README](pcb/hmi/submodule/feedback/FES_AO4882/README.md) |
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| IMU ICM-20948 | 9-axis IMU |  | [README](pcb/hmi/submodule/sensor/IMU_ICM20948/README.md) |
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| Dry electrodes (16ch) | Rigid dry electrode interface |  | [README](pcb/hmi/interface/DRY_ELEC_16CH/README.md) |
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---
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## Bus architecture
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CleverHand uses a **shared bus architecture** combining:
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* a 5-bit address bus,
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* SPI for high-rate data transfer,
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* I²C for identification and configuration.
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Each communication module:
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* monitors the address bus,
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* activates the chip-select of the targeted submodule,
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* routes SPI transactions accordingly.
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---
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## Addressing & initialization
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Module addressing is determined during an initialization phase based on
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**physical position in the chain**.
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Current status:
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* deterministic addressing: **implemented**
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* dynamic hot-plugging: **not yet supported**
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Future work will refine:
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* formal initialization protocol documentation,
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* dynamic re-enumeration strategies.
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---
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## Evaluation, QC & readiness
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Hardware quality and maturity are **explicitly tracked**, not implied.
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For each module:
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* readiness level is declared in `description.yaml`,
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* QC profiles and reports live in the module’s `qc/` folder,
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* catalog readiness is generated automatically.
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Only **REFERENCE-level modules** are considered stable and suitable
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for external reuse without direct support.
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---
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## Repository structure
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This repository contains the hardware designs and supporting assets for the CleverHand platform.
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```
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├── docs
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│ ├── datasheet
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│ ├── img
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│ ├── initialisation
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│ └── plots
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├── LICENSE
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├── pcb
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│ ├── config_file
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│ ├── controller
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│ ├── hmi
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│ └── tool
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├── README.md
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└── scripts
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```
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Each top-level directory has a clear, non-overlapping responsibility, described below.
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---
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## Relation to other repositories
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* Firmware: see top-level CleverHand firmware repository
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* Software / SDKs: see CleverHand interface repository
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* Platform roadmap and policies: see top-level CleverHand README
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---
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## Status
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The CleverHand hardware platform is **actively evolving**.
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Some modules are experimental; others are approaching reference quality.
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Authoritative status is always given by:
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* module metadata,
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* QC artifacts,
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* and the generated catalog.
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