7
mirror of https://github.com/issus/altium-library.git synced 2025-04-10 13:39:49 +00:00
Commit Graph

7532 Commits

Author SHA1 Message Date
Mark
77ef188cd9 Create AD MSOP-12 4x3MM MSE.step 2022-06-16 07:17:40 +01:00
Mark
7bbd36042c Create PCB - LEADLESS - DFN - AD DFN-12 3X3MM DD.PcbLib 2022-06-16 07:04:52 +01:00
Mark
184255be5b Create AD DFN-12 3X3MM DD.step 2022-06-16 07:04:46 +01:00
Mark
bae6084ef3 Create SCH - BATTERY - MPD BH9VPC.SCHLIB 2022-06-16 05:57:35 +01:00
Mark
6e13c61e20 Create SCH - BATTERY - MPD BC2AAPC.SCHLIB 2022-06-16 05:57:31 +01:00
Mark
d203f6de99 Create PCB - BATTERY HOLDER - MPD BH9VPC.PCBLIB 2022-06-16 05:56:18 +01:00
Mark
0d9e5c52a2 Create PCB - BATTERY HOLDER - MPD BC2AAPC.PCBLIB 2022-06-16 05:56:02 +01:00
Mark
edd4b17e0a Create MPD - BH9VPC.step 2022-06-16 05:18:28 +01:00
Mark
fa96a7a631 Create SCH - POWER - LINEAR VREG - AD ADP7182 TSOT5 FIXED.SchLib 2022-06-16 05:00:11 +01:00
Mark
e68749e109 Create SCH - POWER - LINEAR VREG - AD ADP7182 TSOT5 ADJ.SchLib 2022-06-16 05:00:10 +01:00
Mark
3c45f6e214 Create SCH - POWER - LINEAR VREG - AD ADP7182 LFCSP8 FIXED.SchLib 2022-06-16 05:00:08 +01:00
Mark
5fd3572eac Create SCH - POWER - LINEAR VREG - AD ADP7182 LFCSP8 ADJ.SchLib 2022-06-16 05:00:06 +01:00
Mark
9790f760db Create SCH - POWER - LINEAR VREG - AD ADP7182 LFCSP6 FIXED.SchLib 2022-06-16 05:00:04 +01:00
Mark
be94aea52a Create SCH - POWER - LINEAR VREG - AD ADP7182 LFCSP6 ADJ.SchLib 2022-06-16 05:00:02 +01:00
Mark
f9e3821fbf Create PCB - LEADLESS - LFCSP - AD LFCSP-8 3X3MM CP-8-13.PcbLib 2022-06-16 04:47:42 +01:00
Mark
227eec021c Create AD LFCSP-8 3X3MM CP-8-13.step 2022-06-16 04:47:39 +01:00
Mark
672e1593a7 Create SCH - POWER - SWITCHMODE - MAXIM MAX17578.SCHLIB 2022-06-16 04:40:04 +01:00
Mark
ee101982c0 Create PCB - LEADLESS - LFCSP - AD LFCSP-6 2X2MM CP-6-3.PcbLib 2022-06-16 04:39:57 +01:00
Mark
b7e69cb520 Create ANALOG DEV LFCSP-6 2X2MM CP-6-3.step 2022-06-16 04:39:55 +01:00
Mark
55836ce4ec Create PCB - LEADLESS - DFN - MAXIM TDFN-12 3X3MM TD1233+1.PCBLIB 2022-06-16 04:18:38 +01:00
Mark
7ca8b7064c Create MAXIM DFN-12 TD1233+1.step 2022-06-16 04:18:28 +01:00
Library Bot
2c0012b90f Automated update 2022-06-15 19:59:27 -07:00
Mark
5766c02f2e Merge branch 'master' of https://github.com/issus/altium-library 2022-06-16 03:54:53 +01:00
Mark
2067f20856 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B6833-Q1PWP.SchLib 2022-06-16 03:54:38 +01:00
Mark
7330a8386d Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B6701-Q1PWP.SchLib 2022-06-16 03:54:37 +01:00
Mark
897921f76e Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B6333-Q1PWP.SchLib 2022-06-16 03:54:37 +01:00
Mark
659078109d Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B4254-Q1DDA.SchLib 2022-06-16 03:54:37 +01:00
Mark
bd0faedbd6 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B4253-Q1PWP.SchLib 2022-06-16 03:54:36 +01:00
Mark
81cbdf9501 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B4253-Q1DDA.SchLib 2022-06-16 03:54:36 +01:00
Mark
e2942a1d8f Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7B4250-Q1DBV.SchLib 2022-06-16 03:54:35 +01:00
Mark
360ad4f464 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A92DSK.SchLib 2022-06-16 03:54:35 +01:00
Mark
0f4d4a2bfc Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A91DSK.SchLib 2022-06-16 03:54:35 +01:00
Mark
f66195013e Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A9001DSK.SchLib 2022-06-16 03:54:34 +01:00
Mark
7d2fbed8b6 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A89RTJ.SchLib 2022-06-16 03:54:34 +01:00
Mark
58c6336bd9 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A88RTJ.SchLib 2022-06-16 03:54:34 +01:00
Mark
67a095b697 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A88-Q1RTJ.SchLib 2022-06-16 03:54:33 +01:00
Mark
4d280cd89b Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A87RTJ.SchLib 2022-06-16 03:54:33 +01:00
Mark
8cae0782ed Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A85RGR.SchLib 2022-06-16 03:54:33 +01:00
Mark
99e59e82bd Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A8500ARGR.SchLib 2022-06-16 03:54:32 +01:00
Mark
aca8aef815 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A84RGR.SchLib 2022-06-16 03:54:32 +01:00
Mark
2e3ef9cbf6 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A8400ARGR.SchLib 2022-06-16 03:54:32 +01:00
Mark
a768895f85 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A8300RGW.SchLib 2022-06-16 03:54:31 +01:00
Mark
70e15e7cf5 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A8300ARGR.SchLib 2022-06-16 03:54:31 +01:00
Mark
e53461f0a2 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A8101DRB.SchLib 2022-06-16 03:54:31 +01:00
Mark
c56722e7a1 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A8101-Q1DRB.SchLib 2022-06-16 03:54:30 +01:00
Mark
5429d6ae36 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A78PWP.SchLib 2022-06-16 03:54:30 +01:00
Mark
552fdf70a7 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A7300RGWR.SchLib 2022-06-16 03:54:30 +01:00
Mark
85397a87ec Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A7200RGWR.SchLib 2022-06-16 03:54:29 +01:00
Mark
7cdc1208b3 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A7100RGW.SchLib 2022-06-16 03:54:29 +01:00
Mark
106a1a8cf3 Create symbols/Power - Linear VReg/SCH - POWER - LINEAR VREG - TI TPS7A7002DDA.SchLib 2022-06-16 03:54:29 +01:00