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2026-05-16 08:49:28 +02:00
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2026-05-07 14:20:46 +02:00
2026-05-07 14:20:46 +02:00

Utility Breadboard PCB

Subsystem: Utilities Status: 🧪 Sample boards ordered for testing

Design Files:

Manufacturing Files:

  • Version: v2r1

  • KiCad: v10

  • Date: 2026-05-07

  • Release: utils-breadboard-v2r1

  • Artifacts:

    • Schematics: No
    • Gerbers, Drill and Centroid: Included (ZIP)
    • BOM: Included (CSV)
    • Panel File: Not Included
    • Instruction:
      • Ordering: Included (PCBWay: TXT)
      • Sourcing: Included (DigiKey: URL)
      • Assembly: Included (PCBWay: TXT)
    • 3D Model: Included (STEP)
    • 3D Render: Included (WebP)

    3D Render

Overview

The Utility Breadboard PCB is a development and integration tool that breaks out bacBus signals onto standard 2.54 mm header pitch for prototyping on a breadboard. It supports bacBus pinout v4 and can be populated as either a bacBus A or B variant. Power rails (VBAT, 3V3 AUX, 3V3 MAIN, 5V MAIN) and all routable system signals are exposed, making it suitable for bench bring-up, subsystem integration testing, and firmware development.

Due to the 2-layer stackup, a subset of signals cannot be routed through (see Known Limitations).

Specifications

  • Dimensions: 85 mm × 85 mm
  • Thickness: 1.6 mm
  • Layer Count: 2
  • Copper Weight: 1 oz
  • Stackup: PCBWay standard 2L
    1. F.Cu — Mix
    2. B.Cu — Mix
  • Impedance Targets: Not controlled
  • Panelization: No
  • Edge Cuts: PCB edge cuts v3r1 (DXF: graphics/bac-pcb-v3r1-edgecuts.dxf)
  • Mounting: PCB Clamps, PCB Holders
  • Stacking: bacBus connector on Ym edge using bacBus pinout v4; rotate 180° to use as bacBus B
  • ECAD: Schematic and layout created in KiCad 9.0.8 and migrated to KiCad 10 for release

Connectors and Interfaces

  • bacBus (A or B): Single bacBus connector on the Ym edge (bacBus pinout v4). The board is symmetric — install at 0° for bacBus A position, or rotate 180° for bacBus B position.
  • Power buses: VBAT, 3V3 AUX, 3V3 MAIN, 5V MAIN broken out to 2.54 mm spaced, 1 mm diameter PTH
  • System signals: All routable bacBus system signals broken out to 2.54 mm spaced, 1 mm diameter PTH
  • GPIO: GPIO 9 and GPIO 10 broken out to 2.54 mm spaced, 1 mm diameter PTH

Known Limitations & Design Decisions

  • 2-layer routing constraints — reserved signals 2 and 3: bacBus reserved signals 2 and 3 are not passed through due to routing constraints.
  • 2-layer routing constraints — GPIO 3, 4, 11, 12: GPIO lines 3, 4, 11, and 12 are not passed through for the same reason.

Revision History

Version Date Summary
v2r1 2026-05-07 New PCB edge cuts v3r1 (85 mm × 85 mm); bacBus pinout v4; all routable system signals broken out; GPIO 9 and 10 broken out; VBAT, 3V3 AUX, 3V3 MAIN, 5V MAIN power rails exposed
v1r1 2025-05-14 Initial release for bacBus v3rX

Notes

Sample boards have been ordered for testing. Manufacturing files reflect the as-ordered configuration. This board is not flight-qualified and is intended for development and integration use only.

License

CERN OHL-S 2.0

Contributing

Contributions to the Build a CubeSat hardware ecosystem are highly appreciated! To keep things structured, here's how you can contribute:

Fixes & Improvements to Existing Designs

  1. Create a new feature branch (git checkout -b feature/your-feature-name)
  2. Commit your changes (git commit -m 'Brief description of change')
  3. Push to the branch (git push origin feature/your-feature-name)
  4. Submit a Pull Request (PR) with a clear description of the changes

New Designs & Community Contributions

  • Create your own repository
  • Share a link in community discussions or open an issue
  • If relevant, it will be referenced in the docs 🙌

Supporting This Project

If you'd like to support the Build a CubeSat project further, consider these options: