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Extract images for BBB_SRM.md

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Jason Kridner 2017-02-08 00:46:17 -05:00
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@ -1,4 +1,4 @@
![](media/image1.jpg){width="6.236805555555556in"
![](docs/media/image1.jpg){width="6.236805555555556in"
height="4.170138888888889in"}
> **BeagleBone Black**
@ -949,7 +949,7 @@ This is sufficient for the tethered scenario and creates an out of box
experience where the board can be used immediately with no other
equipment needed.
![](media/image7.jpg){width="5.983333333333333in"
![](docs/media/image7.jpg){width="5.983333333333333in"
height="4.160416666666666in"}
**Figure 1. In The Box **
@ -988,7 +988,7 @@ a USB storage drive or via the browser on the PC. You need to use either
Firefox or Chrome on the PC, IEx will not work properly. **Figure 2**
shows this configuration.
![](media/image8.jpg){width="6.593055555555556in"
![](docs/media/image8.jpg){width="6.593055555555556in"
height="1.738888888888889in"}
###### Figure 2. Tethered Configuration
@ -1003,7 +1003,7 @@ this should rarely be necessary.
> 1\. Connect the small connector on the USB cable to the board as shown in
> **Figure 4**. The connector is on the bottom side of the board.
![](media/image9.jpg){width="4.700001093613299in"
![](docs/media/image9.jpg){width="4.700001093613299in"
height="2.1534722222222222in"}
###### Figure 3. USB Connection to the Board
@ -1014,7 +1014,7 @@ height="2.1534722222222222in"}
3. The board will power on and the power LED will be on as shown in
**Figure 4** below.
![](media/image10.jpg){width="4.1819444444444445in"
![](docs/media/image10.jpg){width="4.1819444444444445in"
height="2.786111111111111in"}
###### Figure 4. Board Power LED
@ -1025,7 +1025,7 @@ height="2.786111111111111in"}
> come on, so be patient. The LEDs will be flashing in an erratic manner
> as it begins to boot the Linux kernel.
![](media/image11.jpg){width="5.641666666666667in"
![](docs/media/image11.jpg){width="5.641666666666667in"
height="2.6479166666666667in"}
###### Figure 5. Board Boot Status
@ -1055,7 +1055,7 @@ your code to make the board do whatever you need it to do. It will
however require certain common PC accessories. These accessories and
instructions are described in the following section.
> ![](media/image12.jpg){width="3.713888888888889in"
> ![](docs/media/image12.jpg){width="3.713888888888889in"
> height="4.270138888888889in"}
###### Figure 6. Desktop Configuration
@ -1089,7 +1089,7 @@ For an up-to-date list of confirmed working accessories please go to
> of your HDMI port. If you have a DVI-D Monitor go to **Step 3**,
> otherwise proceed to **Step 4.**
![](media/image13.jpg){width="2.716666666666667in"
![](docs/media/image13.jpg){width="2.716666666666667in"
height="0.9916666666666667in"}
###### Figure 7. Connect microHDMI Cable to the Monitor
@ -1099,18 +1099,19 @@ height="0.9916666666666667in"}
below from two perspectives. If you use this configuration, you will
not have audio support.
> ![](media/image14.jpg){width="5.068694225721785in"
> ![](docs/media/image14.jpg){width="5.068694225721785in"
> height="2.930533683289589in"}
2. If you have a single wireless keyboard and mouse combination such as
seen in Figure **9** below, you need to plug the receiver in the USB
host port of the board as shown in **Figure 10**.
![](media/image16.jpg){width="2.475in" height="1.1333333333333333in"}
![](docs/media/image16.jpg){width="2.475in"
height="1.1333333333333333in"}
###### Figure 9. Wireless Keyboard and Mouse Combo
![](media/image17.jpg){width="2.9069444444444446in"
![](docs/media/image17.jpg){width="2.9069444444444446in"
height="2.316666666666667in"}
###### Figure 10. Connect Keyboard and Mouse Receiver to the Board
@ -1121,7 +1122,7 @@ more than one port for other devices. Note that the board can only
supply up to 500mA, so if you plan to load it down, it will need to be
externally powered.
![](media/image18.jpg){width="5.309722222222222in"
![](docs/media/image18.jpg){width="5.309722222222222in"
height="1.5853062117235346in"}
###### Figure 11. Keyboard and Mouse Hubs
@ -1133,7 +1134,7 @@ Ethernet cable can be used. Connect the Ethernet Cable to the Ethernet
port as shown in **Figure 12**. Any standard 100M Ethernet cable should
work.
> ![](media/image24.jpg){width="4.511805555555555in"
> ![](docs/media/image24.jpg){width="4.511805555555555in"
> height="2.7583333333333333in"}
###### Figure 12. Ethernet Cable Connection
@ -1143,7 +1144,7 @@ work.
The final step is to plug in the DC power supply to the DC power jack as
shown in **Figure 13** below.
![](media/image25.jpg){width="6.441666666666666in"
![](docs/media/image25.jpg){width="6.441666666666666in"
height="3.1118055555555557in"}
###### Figure 13. External DC Power
@ -1153,7 +1154,7 @@ height="3.1118055555555557in"}
> connector is on the bottom side of the board as shown in **Figure 14**
> below.
![](media/image26.jpg){width="5.626388888888889in"
![](docs/media/image26.jpg){width="5.626388888888889in"
height="2.370138888888889in"}
###### Figure 14. Connect microHDMI Cable to the Board
@ -1170,7 +1171,7 @@ stress on the connector or cable.
> seconds for the status LEDs to come on, so be patient. The LEDs will
> be flashing in an erratic manner as it boots the Linux kernel.
![](media/image11.jpg){width="5.641666666666667in"
![](docs/media/image11.jpg){width="5.641666666666667in"
height="2.6486111111111112in"}
###### Figure 15. Board Boot Status
@ -1205,7 +1206,7 @@ from the Linux kernel.
4. And at this point you are ready to go! **Figure 16** shows the
desktop after booting.
![](media/image27.jpg){width="5.346527777777778in"
![](docs/media/image27.jpg){width="5.346527777777778in"
height="3.0083333333333333in"}
###### Figure 16. Desktop Screen
@ -1408,7 +1409,7 @@ the various components on the board.
**Figure 17** below shows the locations of the connectors, LEDs, and
switches on the PCB layout of the board.
![](media/image28.jpg){width="5.309722222222222in"
![](docs/media/image28.jpg){width="5.309722222222222in"
height="3.546527777777778in"}
####### Figure 17. Connectors, LEDs and Switches
@ -1445,7 +1446,7 @@ height="3.546527777777778in"}
**Figure 18** below shows the locations of the key components on the PCB
layout of the board.
![](media/image29.jpg){width="5.993055555555555in"
![](docs/media/image29.jpg){width="5.993055555555555in"
height="4.346527777777778in"}
####### Figure 18. Key Components
@ -1476,7 +1477,7 @@ Black.
**Figure 19** below is the high level block diagram of the BeagleBone
Black.
![](media/image30.jpg){width="5.341666666666667in"
![](docs/media/image30.jpg){width="5.341666666666667in"
height="4.738194444444445in"}
> **Figure 19. BeagleBone Black Key Components **
@ -1770,7 +1771,7 @@ those who may be concerned, **Figure 20** is the same figure as **Figure
19** back on page 31**.** It is placed here again for convenience so it
is closer to the topics to follow.
![](media/image30.jpg){width="5.341666666666667in"
![](docs/media/image30.jpg){width="5.341666666666667in"
height="4.738194444444445in"}
> **Figure 20. BeagleBone Black Block Diagram **
@ -1780,7 +1781,7 @@ height="4.738194444444445in"}
**Figure 21** is the high level block diagram of the power section of
the board.
![](media/image31.png){width="4.347305336832896in"
![](docs/media/image31.png){width="4.347305336832896in"
height="2.8976673228346455in"}
###### Figure 21. High Level Power Block Diagram
@ -1830,7 +1831,7 @@ For more information on the **TPS65217C**, refer to
> **Figure 22** is the high level block diagram of the **TPS65217C**.
![](media/image37.png){width="5.733333333333333in" height="6.56in"}
![](docs/media/image37.png){width="5.733333333333333in" height="6.56in"}
###### Figure 22. TPS65217C Block Diagram
@ -1839,7 +1840,7 @@ For more information on the **TPS65217C**, refer to
**Figure 23** below shows how the DC input is connected to the
**TPS65217C**.
> ![](media/image38.png){width="4.78in" height="4.25in"}
> ![](docs/media/image38.png){width="4.78in" height="4.25in"}
###### Figure 23. TPS65217 DC Connection
@ -2027,7 +2028,8 @@ require SW support.
**Figure 25** shows the connections of each of the rails from the
**TPS65217C**.
![](media/image39.jpg){width="5.858333333333333in" height="5.26875in"}
![](docs/media/image39.jpg){width="5.858333333333333in"
height="5.26875in"}
####### Figure 25. Power Rails
@ -2087,7 +2089,7 @@ additional information. I saw no need to bust it up into smaller
diagrams. It is from the processor datasheet supplied by Texas
Instruments.
![](media/image40.png){width="5.703333333333333in" height="4.14in"}
![](docs/media/image40.png){width="5.703333333333333in" height="4.14in"}
####### Figure 26. Power Rail Power Up Sequencing
@ -2097,7 +2099,7 @@ powers up and the voltages on each rail. The power sequencing starts at
configured. You can refer to the TPS65217C datasheet for more
information.
![](media/image41.png){width="2.3466666666666667in"
![](docs/media/image41.png){width="2.3466666666666667in"
height="1.9666666666666666in"}
####### Figure 27. TPS65217C Power Sequencing Timing
@ -2116,7 +2118,7 @@ issue that caused it to shut down. The connection of the LED is shown in
processor. It is a cut from the PDF form of the schematic and reflects
what is on the schematic.
![](media/image42.jpg){width="5.996527777777778in"
![](docs/media/image42.jpg){width="5.996527777777778in"
height="1.9319444444444445in"}
####### Figure 28. Power Processor Interfaces
@ -2209,7 +2211,7 @@ processor.
information on the processor, go to
[*http://www.ti.com/product/am3358*.](http://www.ti.com/product/am3358)
![](media/image43.png){width="5.243333333333333in"
![](docs/media/image43.png){width="5.243333333333333in"
height="5.326666666666667in"}
###### Figure 29. Sitara AM3358BZCZ Block Diagram
@ -2276,7 +2278,7 @@ use the latest datasheets and Technical Reference Manuals (TRM).
**Figure 30** is the crystal circuitry for the AM3358 processor.
> ![](media/image44.png){width="5.943333333333333in"
> ![](docs/media/image44.png){width="5.943333333333333in"
> height="2.3266666666666667in"}
**Figure 30. Processor Crystals **
@ -2299,7 +2301,7 @@ the PORZn signal from the TPS65217C is connected to the SYS\_RESETn line
using an open drain buffer. These ensure that the line does not
momentarily go high on power up.
![](media/image45.png){width="5.926667760279965in"
![](docs/media/image45.png){width="5.926667760279965in"
height="3.4766666666666666in"}
###### Figure 31. Board Reset Circuitry
@ -2367,7 +2369,8 @@ refresh exit. Input buffers (excluding CK, CK\#, CKE, RESET\#, and ODT)
are disabled during powerdown. Input buffers (excluding CKE and RESET\#)
are disabled during SELF REFRESH. CKE is referenced to VREFCA.
> ![](media/image46.png){width="5.903334426946632in" height="5.47in"}
> ![](docs/media/image46.png){width="5.903334426946632in"
> height="5.47in"}
###### Figure 32. DDR3L Memory Design
@ -2403,7 +2406,7 @@ The **VREF** signal is generated from a voltage divider on the
device itself. **Figure 33** below shows the configuration of this
signal and the connection to the DDR3L memory device and the processor.
> ![](media/image47.jpg){width="3.9166666666666665in"
> ![](docs/media/image47.jpg){width="3.9166666666666665in"
> height="2.8020833333333335in"}
**Figure 33. DDR3L VREF Design **
@ -2455,7 +2458,7 @@ was chosen to provide a little margin.
Pullup resistors are used to increase the rise time on the signals to
compensate for any capacitance on the board.
![](media/image48.png){width="5.653334426946632in" height="2.34in"}
![](docs/media/image48.png){width="5.653334426946632in" height="2.34in"}
**Figure 34. eMMC Memory Design **
@ -2464,7 +2467,7 @@ The pins used by the eMMC1 in the boot mode are listed below in **Table
###### Table 6. eMMC Boot Pins
![](media/image49.png){width="5.510001093613298in" height="1.17in"}
![](docs/media/image49.png){width="5.510001093613298in" height="1.17in"}
For eMMC devices the ROM will only support raw mode. The ROM Code reads
out raw sectors from image or the booting file within the file system
@ -2530,7 +2533,7 @@ the contents of the EERPOM.
**Figure 35** shows the new design on the EEPROM interface**.**
![](media/image50.png){width="4.930001093613298in"
![](docs/media/image50.png){width="4.930001093613298in"
height="2.0233333333333334in"}
###### Figure 35. EEPROM Design Rev A5
@ -2553,7 +2556,7 @@ be used for booting or file storage on the BeagleBone Black.
**Figure 36** below is the design of the microSD interface on the board.
![](media/image51.png){width="5.73in" height="2.26in"}
![](docs/media/image51.png){width="5.73in" height="2.26in"}
####### Figure 36. microSD Design
@ -2585,7 +2588,8 @@ There are four user LEDs on the BeagleBone Black. These are connected to
GPIO pins on the processor. **Figure 37** shows the interfaces for the
user LEDs.
> ![](media/image52.png){width="5.943333333333333in" height="3.03in"}
> ![](docs/media/image52.png){width="5.943333333333333in"
> height="3.03in"}
####### Figure 37. User LEDs
@ -2633,7 +2637,8 @@ configuration process. On power up, these pins are read by the processor
to determine the boot order. S2 is used to change the level of one bit
from HI to LO which changes the boot order.
> ![](media/image53.png){width="4.673333333333333in" height="3.83in"}
> ![](docs/media/image53.png){width="4.673333333333333in"
> height="3.83in"}
####### Figure 38. Processor Boot Configuration Design
@ -2649,7 +2654,7 @@ out of reset these signals are removed from the expansion pins.
Based on the selected option found in **Figure 39** below, each of the
boot sequences for each of the two settings is shown.
![](media/image54.jpg){width="6.260543525809274in"
![](docs/media/image54.jpg){width="6.260543525809274in"
height="1.3582666229221347in"}
####### Figure 39. Processor Boot Configuration
@ -2677,7 +2682,8 @@ described in the following sections.
**Figure 40** shows the connections between the processor and the PHY.
The interface is in the MII mode of operation.
> ![](media/image55.png){width="4.676667760279965in" height="3.25in"}
> ![](docs/media/image55.png){width="4.676667760279965in"
> height="3.25in"}
####### Figure 40. Ethernet Processor Interface
@ -2689,7 +2695,7 @@ made in this design for the board.
The off board side of the PHY connections are shown in **Figure 41**
below.
![](media/image56.png){width="5.943334426946632in"
![](docs/media/image56.png){width="5.943334426946632in"
height="3.6166666666666667in"}
####### Figure 41. Ethernet Connector Interface
@ -2703,7 +2709,7 @@ made in this design for the board.
**LAN8710A** PHY. Each of these areas is discussed in more detail in the
following sections.
> ![](media/image57.png){width="5.940001093613298in"
> ![](docs/media/image57.png){width="5.940001093613298in"
> height="3.8266666666666667in"}
####### Figure 42. Ethernet PHY, Power, Reset, and Clocks
@ -2830,7 +2836,7 @@ original BeagleBone. The unused bits on the **TDA19988** are tied low.
In addition to the data signals are the VSYNC, HSYNC, DE, and PCLK
signals that round out the video interface from the processor.
> ![](media/image58.png){width="4.683333333333334in"
> ![](docs/media/image58.png){width="4.683333333333334in"
> height="5.013334426946631in"}
####### Figure 44. HDMI Framer Processor Interface
@ -2846,7 +2852,7 @@ operation. **Table 10** shows the I2C address.
####### Table 10. TDA19988 I2C Address
![](media/image59.png){width="5.9600010936132986in"
![](docs/media/image59.png){width="5.9600010936132986in"
height="0.7533344269466317in"}
#### 6.10.5 Interrupt Signal
@ -2881,7 +2887,7 @@ order to keep GPIO3\_21 functionality, we provided a way to disable the
oscillator if the need was there to use the pin on the expansion header.
**Figure 45** shows the oscillator circuitry.
![](media/image60.png){width="5.995129046369204in"
![](docs/media/image60.png){width="5.995129046369204in"
height="1.7631616360454943in"}
####### Figure 45. 24.576MHZ Oscillator
@ -2892,7 +2898,7 @@ height="1.7631616360454943in"}
All voltage rails for the device are at 1.8V. A filter is provided to
minimize any noise from the 1.8V rail getting back into the device.
> ![](media/image64.png){width="5.730001093613298in"
> ![](docs/media/image64.png){width="5.730001093613298in"
> height="3.2866666666666666in"}
####### Figure 46. HDMI Power Connections
@ -2905,7 +2911,7 @@ All of the interfaces between the processor and the **TDA19988** are
**Figure 47** shows the design of the interface between the HDMI Framer
and the connector.
![](media/image65.png){width="5.4366666666666665in"
![](docs/media/image65.png){width="5.4366666666666665in"
height="4.486666666666666in"}
####### Figure 47. Connector Interface Circuitry
@ -2920,7 +2926,7 @@ The board is equipped with a single USB host interface accessible from a
single USB Type A female connector. **Figure 48** is the design of the
USB Host circuitry.
> ![](media/image66.png){width="5.943334426946632in"
> ![](docs/media/image66.png){width="5.943334426946632in"
> height="2.1433333333333335in"}
#### 6.11.1 Power Switch
@ -2978,7 +2984,8 @@ accessible on the BeagleBone Black).
**Figure 49** is a high level block diagram of the PRU-ICSS.
![](media/image67.png){width="4.45in" height="2.8666666666666667in"}
![](docs/media/image67.png){width="4.45in"
height="2.8666666666666667in"}
####### Figure 49. PRU-ICSS Block Diagram
@ -3061,7 +3068,7 @@ board will be* *damaged.* **
**Figure 50** shows the location of the expansion connectors.
![](media/image68.jpg){width="2.9819444444444443in"
![](docs/media/image68.jpg){width="2.9819444444444443in"
height="4.111805555555556in"}
###### Figure 50. Expansion Connector Location
@ -3149,7 +3156,7 @@ mode to align with the mode column will give that function on that pin.
45 R1 GPIO2\_6 lcd\_data0 gpmc\_a0 ehrpwm2A
46 R2 GPIO2\_7 lcd\_data1 gpmc\_a1 ehrpwm2B
> ![](media/image2.jpg){width="5.873611111111111in" height="0.5in"}
> ![](docs/media/image2.jpg){width="5.873611111111111in" height="0.5in"}
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
#### 7.1.2 Connector P9
@ -3255,7 +3262,7 @@ shown in **Figure 51**. This uses the same power connector as is used on
the original BeagleBone. The connector has a 2.1mm diameter center post
(5VDC) and a 5.5mm diameter outer dimension on the barrel (GND).
![](media/image69.jpg){width="6.041388888888889in"
![](docs/media/image69.jpg){width="6.041388888888889in"
height="4.281972878390201in"}
###### Figure 51. 5VDC Power Jack
@ -3272,7 +3279,7 @@ miniUSB cable, the same as is used on the original BeagleBone. The cable
is provided with the board. The cable can also be used to power the
board.
![](media/image71.jpg){width="6.602055993000875in"
![](docs/media/image71.jpg){width="6.602055993000875in"
height="4.730194663167104in"}
This port is a USB Client only interface and is intended for connection
@ -3283,7 +3290,7 @@ to a PC.
There is a single USB Host connector on the board and is shown in
**Figure 53** below.
![](media/image71.jpg){width="6.184388670166229in"
![](docs/media/image71.jpg){width="6.184388670166229in"
height="4.033500656167979in"}
###### Figure 53. USB Host Connector
@ -3297,7 +3304,7 @@ Each board has a debug serial interface that can be accessed by using a
special serial cable that is plugged into the serial header as shown in
**Figure 54** below.
> ![](media/image71.jpg){width="5.4998611111111115in"
> ![](docs/media/image71.jpg){width="5.4998611111111115in"
> height="3.6651673228346455in"}
###### Figure 54. Serial Debug Header
@ -3306,7 +3313,7 @@ Two signals are provided, TX and RX on this connector. The levels on
these signals are 3.3V. In order to access these signals, a FTDI USB to
Serial cable is recommended as shown in **Figure 55** below.
> ![](media/image73.jpg){width="4.465360892388452in"
> ![](docs/media/image73.jpg){width="4.465360892388452in"
> height="1.6920614610673665in"}
The cable can be purchased from several different places and must be the
@ -3346,7 +3353,7 @@ perspective of the board.
**Figure 56** shows the pin location on the board.
> ![](media/image75.jpg){width="3.8956944444444446in"
> ![](docs/media/image75.jpg){width="3.8956944444444446in"
> height="3.9025273403324583in"}
**Figure 56. Serial Header **
@ -3356,7 +3363,8 @@ perspective of the board.
Access to the HDMI interface is through the HDMI connector that is
located on the bottom side of the board as shown in **Figure 57** below.
> ![](media/image71.jpg){width="6.03625in" height="4.033500656167979in"}
> ![](docs/media/image71.jpg){width="6.03625in"
> height="4.033500656167979in"}
###### Figure 57. HDMI Connector
@ -3365,7 +3373,7 @@ limitations we had in finding a place to fit the connector. It requires
a microHDMI to HDMI cable as shown in **Figure 58** below. The cable can
be purchased from several different sources.
> ![](media/image77.jpg){width="2.0430555555555556in"
> ![](docs/media/image77.jpg){width="2.0430555555555556in"
> height="2.0430566491688538in"}
**Figure 58. HDMI Cable **
@ -3376,7 +3384,7 @@ A microSD connector is located on the back or bottom side of the board
as shown in **Figure 59** below. The microSD card is not supplied with
the board.
![](media/image71.jpg){width="6.039388670166229in"
![](docs/media/image71.jpg){width="6.039388670166229in"
height="4.566833989501312in"}
###### Figure 59. microSD Connector
@ -3395,7 +3403,8 @@ Do not pull the SD card out or you could damage the connector.
The board comes with a single 10/100 Ethernet interface located next to
the power jack as shown in **Figure 60**.
> ![](media/image71.jpg){width="6.03625in" height="4.033500656167979in"}
> ![](docs/media/image71.jpg){width="6.03625in"
> height="4.033500656167979in"}
**Figure 60. Ethernet Connector **
@ -3611,7 +3620,7 @@ EEPROM, internally organized as 32,768 words of 8 bits each. It features
a 64byte page write buffer and supports the Standard (100 kHz), Fast
(400 kHz) and FastPlus (1 MHz) I2C protocol.
> ![](media/image78.png){width="5.303334426946631in"
> ![](docs/media/image78.png){width="5.303334426946631in"
> height="2.3833333333333333in"}
###### Figure 61. Expansion Board EEPROM Without Write Protect
@ -3683,7 +3692,8 @@ discretion of the cape designer.
VDD\_3V3B
> ![](media/image79.png){width="5.91in" height="1.9766666666666666in"}
> ![](docs/media/image79.png){width="5.91in"
> height="1.9766666666666666in"}
###### Figure 62. Expansion Board EEPROM Write Protect
@ -4003,7 +4013,8 @@ There are 16 pins that control the boot mode of the processor that are
exposed on the expansion headers. **Figure 63** below shows those
signals as they appear on the BeagleBone Black.:
> ![](media/image80.png){width="5.530001093613298in" height="4.88in"}
> ![](docs/media/image80.png){width="5.530001093613298in"
> height="4.88in"}
If you plan to use any of these signals, then on power up, these pins
should not be driven. If you do, it can affect the boot mode of the
@ -4050,7 +4061,7 @@ the last board on the stack, the two 46 pin expansion headers use the
same connectors. **Figure 64** is a picture of the connector. These are
dual row 23 position 2.54mm x 2.54mm connectors.
> ![](media/image81.jpg){width="0.6861111111111111in"
> ![](docs/media/image81.jpg){width="0.6861111111111111in"
> height="0.9381944444444444in"}
###### Figure 64. Single Expansion Connector
@ -4060,7 +4071,7 @@ shown in **Figure 65**. These are very common connectors and should be
easily located. You can also use two single row 23 pin headers for each
of the dual row headers.
![](media/image82.jpg){width="5.9986122047244095in"
![](docs/media/image82.jpg){width="5.9986122047244095in"
height="0.5715277777777777in"}
###### Figure 65. Single Cape Expansion Connector
@ -4102,7 +4113,7 @@ For stacking configuration, the two 46 pin expansion headers use the
same connectors. **Figure 66** is a picture of the connector. These are
dual row 23 position 2.54mm x 2.54mm connectors.
![](media/image83.jpg){width="0.7284722222222222in"
![](docs/media/image83.jpg){width="0.7284722222222222in"
height="0.9381944444444444in"}
###### Figure 66. Expansion Connector
@ -4111,7 +4122,7 @@ The connector is mounted on the top side of the board with longer tails
to allow insertion into the BeagleBone Black. **Figure 67** is the
connector configuration for the connector.
![](media/image84.jpg){width="5.9986122047244095in"
![](docs/media/image84.jpg){width="5.9986122047244095in"
height="0.6847222222222222in"}
###### Figure 67. Stacked Cape Expansion Connector
@ -4156,7 +4167,8 @@ interfere with the operation of your board by exposing those signals for
expansion. This configuration consists of a combination of the stacking
and nonstacking style connectors.
![](media/image85.jpg){width="5.996527777777778in" height="0.74375in"}
![](docs/media/image85.jpg){width="5.996527777777778in"
height="0.74375in"}
###### Figure 68. Stacked w/Signal Stealing Expansion Connector
@ -4181,7 +4193,7 @@ consider when selecting a connector and its pin length.
the pin extends past the contact point on the connector, what we call
overhang.
![](media/image86.jpg){width="5.75in" height="3.279861111111111in"}
![](docs/media/image86.jpg){width="5.75in" height="3.279861111111111in"}
###### Figure 69. Connector Pin Insertion Depth
@ -4311,7 +4323,7 @@ board.
**Figure 70** is the outline of the standard cape. The dimensions are in
inches.
![](media/image87.jpg){width="5.995138888888889in"
![](docs/media/image87.jpg){width="5.995138888888889in"
height="3.8534722222222224in"}
###### Figure 70. Cape Board Dimensions
@ -4376,17 +4388,17 @@ Weight: 1.4 oz
### 9.2 Silkscreen and Component Locations
![](media/image88.jpg){width="5.529861111111111in"
![](docs/media/image88.jpg){width="5.529861111111111in"
height="8.153472222222222in"}
###### Figure 71. Board Dimensions
![](media/image89.jpg){width="5.145138888888889in"
![](docs/media/image89.jpg){width="5.145138888888889in"
height="8.522917760279965in"}
###### Figure 72. Component Side Silkscreen
![](media/image90.jpg){width="5.223611111111111in"
![](docs/media/image90.jpg){width="5.223611111111111in"
height="8.04513888888889in"}
**Figure 73. Circuit Side Silkscreen **
@ -4394,12 +4406,12 @@ height="8.04513888888889in"}
**10.0 Pictures **
==================
![](media/image91.jpg){width="4.961805555555555in"
![](docs/media/image91.jpg){width="4.961805555555555in"
height="8.006944444444445in"}
**Figure 74. Top Side **
![](media/image92.jpg){width="5.066666666666666in"
![](docs/media/image92.jpg){width="5.066666666666666in"
height="7.9631944444444445in"}
**Figure 75. Bottom Side **
@ -4467,16 +4479,16 @@ numbers and revisions keep moving. Different boards can have different
locations depending on when they were made. The following figures show
the three locations of the serial and revision number.
![](media/image93.jpg){width="5.4in" height="3.2131944444444445in"}
![](docs/media/image93.jpg){width="5.4in" height="3.2131944444444445in"}
###### Figure 76. Initial Serial Number and Revision Locations
![](media/image94.jpg){width="5.401388888888889in"
![](docs/media/image94.jpg){width="5.401388888888889in"
height="2.404861111111111in"}
###### Figure 77. Second Phase Serial Number and Revision Location
![](media/image95.jpg){width="5.9986122047244095in"
![](docs/media/image95.jpg){width="5.9986122047244095in"
height="2.321527777777778in"}
> **Figure 78. Third Phase Serial Number and Revision Location **

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