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3d79cfdffa
- Correct 6dB pi-pad values: 150R shunts with 37.4R series (17.6R was the 3dB series arm, giving only 4.3dB attenuation) - Assign buck CIN to 4.7uF/50V X7R 1206 (C29823, basic part); C23733 (10V) stays for general bulk on the 5V/3.3V rails only - Update consign list: STM32G431KBU6 and LMR51420YDDCR back in stock at LCSC/JLCPCB (2026-08-05), only RTC6705 remains consign - Replace expired OpenOSD-X Discord invite with current one Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
249 lines
9.4 KiB
Markdown
249 lines
9.4 KiB
Markdown
# OpenVTX Hardware Design Document
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Open-source 5.8GHz analog VTX with software-defined OSD. 20x20mm, 4-layer, 2S-6S input. Firmware: OpenOSD-X (STM32G4). The schematic and layout are not started yet; this document is the design reference for them.
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## Key ICs
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| IC | Part | LCSC | Package | Notes |
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|----|------|------|---------|-------|
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| MCU | STM32G431KBU6 | C529358 | QFN-32 5x5mm | Native OpenOSD-X target. |
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| RF Synth | RTC6705 | C913074 | QFN-40 6x6mm | Consign. No alternative exists. |
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| FEM | SKY85743-21 | C5348950 | LGA-24 3x5mm | 5V supply! Max +10dBm input! |
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| Buck 5V | LMR51420YDDCR | C5383002 | SOT-23-6 | 1.1MHz, PFM. |
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| LDO 3.3V | TLV75733PDRVR | C2868428 | WSON-6 2x2mm | 1A, 6.5uVrms noise |
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| Rev Pol | AO3401A | C15127 | SOT-23 2.9x1.6mm | -30V, BASIC part, $0.05 |
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| NTC | NCP15XH103F03RC | C77131 | 0402 | 10kOhm, B=3380K |
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| Crystal | 8MHz 3225 | C367183 | SMD 3225 | For RTC6705 |
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| ESD (x2) | PESD5V0S1BL | C2912556 | DFN1006-2 (0402) | One per UART line |
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| Zener 12V | LNZ8F12VT5G-MS | C3018901 | SOD-882 (0402) | Gate clamp for AO3401A |
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| Antenna | IPEX u.FL | C920232 | SMD | With pigtail to MMCX/SMA |
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| FC conn | JST-SH 4P 1mm | C160404 | SMD | 5V, GND, TX, RX |
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| WS2812 | WS2812C-2020-V1 | C2976072 | 2x2mm | Status LED |
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| LED | 16-213/G6C-AK2L2VY/3T | C471422 | 0402 green | Power indicator |
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## Passive BOM (0402 unless noted, JLCPCB basic parts)
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| Value | LCSC | Use |
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|-------|------|-----|
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| 100pF C0G 50V | C1546 | RF bypass, crystal loads |
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| 1nF X7R 50V | C1523 | SKY85743 VDD decoupling |
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| 10nF X7R 50V | C15195 | HF decoupling |
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| 100nF X7R 16V | C1525 | IC decoupling (all), CBOOT |
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| 1uF X5R 25V | C52923 | RTC6705 REG1D8 decoupling |
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| 4.7uF X5R 10V | C23733 | General bulk (5V and 3.3V rails) |
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| 4.7uF X7R 50V (1206) | C29823 | Buck CIN (2x) |
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| 10uF X5R 6.3V | C15525 | Buck COUT, SKY85743 VCC2 |
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| 10pF C0G | - | RF DC blocking (SKY85743 TX_IN, DET) |
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| 75R | C25133 | Video termination |
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| 100R | C25076 | Series damping |
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| 270R | C25187 | Video divider |
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| 1k | C11702 | LED current limit |
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| 1.2k | C25862 | Video divider |
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| 10k | C25744 | NTC pullup, general |
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| 13.7k | - | Buck FB bottom (RFBB) |
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| 47k | C25792 | RTC6705 bias |
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| 100k | C25741 | Buck FB top (RFBT), pulldowns |
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| 510k | C11616 | Video bias |
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| 560k | C25864 | Video bias |
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## Consign Parts (1, source externally and supply to JLCPCB)
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- **RTC6705**: 0 stock LCSC (checked 2026-08-05). No alternative. Source AliExpress/Taobao.
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STM32G431KBU6 (C529358) and LMR51420YDDCR (C5383002) are in stock at LCSC and in the
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JLCPCB assembly library (checked 2026-08-05): order via JLCPCB assembly, no consign needed.
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## SKY85743-21 Pinout and Design Info
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### Pinout (LGA-24, 3x5mm, top view)
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| Pin | Name | Connect to |
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|-----|------|-----------|
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| 1 | GND | Ground |
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| 2 | TX_IN | RTC6705 PAOUT via 6dB atten + 10pF DC block |
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| 3 | GND | Ground |
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| 4 | PA_EN | Tie to +5V (always TX) |
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| 5 | GND | Ground |
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| 6 | GND | Ground |
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| 7 | GND | Ground |
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| 8 | DET | MCU ADC (power detector output) |
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| 9 | GND | Ground |
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| 10 | C1 | Tie to +5V (TX mode) |
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| 11 | GND | Ground |
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| 12 | ANT | IPEX connector (50R trace) |
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| 13 | C0 | Tie to GND (TX mode) |
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| 14 | RX_OUT | NC (unused) |
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| 15 | GND | Ground |
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| 16 | LNA_IN | NC (unused) |
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| 17 | LNA_OUT | NC (unused) |
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| 18 | GND | Ground |
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| 19 | VDD | 1nF to GND (LNA supply, still needs decoupling) |
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| 20 | GND | Ground |
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| 21 | GND | Ground |
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| 22 | VCC3 | +5V, 100nF to GND |
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| 23 | VCC2 | +5V, 10uF to GND |
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| 24 | VCC1 | +5V, 2x 100nF to GND |
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| 25 | GND | Exposed pad, thermal via array (0.3mm drill, 0.6mm pitch) |
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### Critical specs
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- **Supply: 4.2-5.5V** (powered from +5V buck rail)
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- **Max TX_IN: +10 dBm absolute max**. RTC6705 outputs +13dBm, MUST attenuate.
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- **TX mode truth table: PA_EN=1, C0=0, C1=1**
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- **Detector: logarithmic, 0.33V@+5dBm to 0.93V@+28dBm, ~23mV/dB**
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- **CW Psat: ~+27 dBm (500mW)** from MCS0 HT20 rating
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- **Current: 190mA quiescent, 410mA @ +27dBm**
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- **TX_IN is DC-shorted to GND internally, needs 10pF DC blocking cap**
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- **Rugged: survives +10dBm input with 10:1 VSWR mismatch**
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### Attenuator design (6dB pi-pad, 50R)
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RTC6705 PAOUT (+13dBm) -> shunt 150R to GND -> series 37.4R -> shunt 150R to GND -> SKY85743 TX_IN (+7dBm).
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Nearest standard 0402 values: 150R shunts, 36R or 39R series. Tune on bench.
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## RTC6705 Pinout and Design Info
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### Key pins (QFN-40, 6x6mm)
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| Pin | Name | Connect to |
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|-----|------|-----------|
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| 1 | SPI_SE | Tie HIGH (SPI mode) |
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| 5 | SPIDATA | MCU GPIO (bit-bang SPI) |
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| 6 | SPILE | MCU GPIO (SPI latch/CS) |
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| 7 | SPICLK | MCU GPIO (SPI clock) |
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| 10 | VT_MOD | Video input (75R, AC-coupled, 1Vpp) |
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| 23 | REG1D8_1 | 470nF to GND (internal 1.8V regulator) |
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| 24 | XTAL1 | 8MHz crystal + load cap |
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| 25 | XTAL2 | 8MHz crystal + load cap |
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| 26 | REG1D8 | 100nF to GND (internal 1.8V regulator) |
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| 27 | CP | PLL charge pump -> loop filter -> VT |
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| 29 | VT | VCO tune voltage (from loop filter) |
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| 34 | PAOUT2 | RF output (+13dBm, both PAOUTs connected) |
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| 35 | PAOUT1 | RF output (connect with PAOUT2 for full power) |
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| 33 | RFGND | Direct via to ground plane |
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| 8,9,13,17,22,30,31,32,39,40 | Supply | All 3.3V, each 100nF decoupling |
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### SPI protocol
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- 3-wire: DATA, LE (latch), CLK
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- 25-bit frame: 4 addr + 1 R/W + 20 data, LSB first
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- Data on rising CLK edge, latch on rising LE edge
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- Internal pullups on SPI pins
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### Frequency formula
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```
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F_RF = 2 x (N x 64 + A) x (F_osc / R)
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F_osc = 8MHz, R = 400 (default) -> 20kHz step
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```
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### Pit mode
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Register 0x07, set PD_Q5G=1 to kill pre-driver (PA off, PLL stays locked).
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## LMR51420YDDCR Design Values (5V output, 1.1MHz)
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| Component | Value | Notes |
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|-----------|-------|-------|
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| L | 4.7uH | Shielded ferrite, Isat >= 4A, DCR < 100mOhm |
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| CIN | 2x 4.7uF/50V X7R | Plus 100nF HF cap close to VIN/GND |
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| COUT | 2x 10uF/16V X7R | |
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| RFBT | 100k 1% | FB top (VOUT to FB) |
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| RFBB | 13.7k 1% | FB bottom (FB to GND) |
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| CBOOT | 100nF X7R 16V | CB to SW |
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| EN | Tied to VIN | Always-on |
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### Thermal note
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At 6S/1A: marginal (110C rise). Fine at 500mA or less. VTX draws ~400mA input at 6S.
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## AO3401A Reverse Polarity Protection
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- SOT-23, -30V, 4A, 44mOhm Rdson
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- Source on +BATT side, drain to buck VIN
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- Gate: 100k pulldown to GND + 12V zener (LNZ8F12VT5G) to source
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- Upstream TVS diode clamps transients before the MOSFET sees >30V
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- At 400mA: 7mW loss. Negligible.
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## Power Tree
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```
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+BATT -> AO3401A (rev pol) -> TVS clamp -> LMR51420YDDCR -> +5V
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+5V -> TLV75733P -> +3.3V -> STM32G431 + RTC6705
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+5V -> SKY85743-21 (VCC1/VCC2/VCC3)
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+5V -> Camera 5V output pad
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```
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## RF Chain
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```
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Camera (CVBS) -> 75R term -> STM32G4 OPAMP1 (OSD overlay) -> RTC6705 VT_MOD (pin 10)
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RTC6705 PAOUT (+13dBm) -> 6dB pi-attenuator -> 10pF DC block -> SKY85743 TX_IN (pin 2)
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SKY85743 ANT (pin 12) -> 50R microstrip -> IPEX connector
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```
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## VPD Power Control Loop
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```
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RTC6705 register 0x07 (PA power settings) -> adjusts RF drive level
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SKY85743 DET (pin 8) -> MCU ADC
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Firmware: read DET voltage -> compare to target VPD -> adjust RTC6705 PA register
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Detector: logarithmic, ~23mV/dB, 0.33V (+5dBm) to 0.93V (+28dBm)
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```
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## Planned Schematic Structure
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KiCad 9 hierarchical, root `OpenVTX.kicad_sch` plus 4 sub-sheets (not created yet):
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- `mcu.kicad_sch`: STM32G431KBU6, crystal, SWD, UART, SPI, ADC, DAC, OPAMP
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- `rf.kicad_sch`: RTC6705, attenuator, SKY85743-21, IPEX, loop filter
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- `power.kicad_sch`: AO3401A, TVS, LMR51420, TLV75733, power indicator LED
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- `pads.kicad_sch`: All user-facing solder pads, JST connector, test points
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## User-Facing Interface
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| Pad | Function | Notes |
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|-----|----------|-------|
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| +BATT | Battery positive (2-6S) | From PDB or ESC power lead |
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| GND | Battery ground | Multiple pads for low impedance |
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| 5V | Camera power output | Regulated from buck |
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| VIN | Video input (CVBS) | From camera, 75R |
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| TX | UART TX to FC | MSP DisplayPort |
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| RX | UART RX from FC | MSP DisplayPort |
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| SA | SmartAudio | Single-wire, optional fallback |
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| BTN | Button | Channel/power cycle |
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| LED | WS2812 data out | Status: channel, power, pit |
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| IPEX | Antenna | 5.8GHz, use pigtail to MMCX/SMA |
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| SWDIO | Debug | Test point only |
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| SWCLK | Debug | Test point only |
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| NRST | Reset | Test point only |
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## PCB Specifications
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- **Size**: 20x20mm, M2 mounting holes at 16x16mm
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- **Layers**: 4-layer (JLCPCB JLC04161H-7628 stackup)
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- **Layer assignment**: L1 = signal + RF, L2 = GND (unbroken under RF), L3 = power, L4 = signal
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- **RF traces**: 50R microstrip on L1, solid L2 ground reference
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- **Thermal vias**: 3x3 array under SKY85743 pad (0.3mm drill, 0.6mm pitch)
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- **Copper**: 1oz standard (2oz outer if budget allows)
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- **Antenna**: IPEX on board edge, keepout under connector
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## Firmware
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- Target: OpenOSD-X (STM32G4, GPL-3.0)
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- Build: CMake + arm-none-eabi-gcc
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- MCU is a native QFN-32 target, no pin remap needed
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- VPD calibration table required per board (spectrum analyzer needed)
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- VPD loop needs adaptation: SKY85743 logarithmic detector replaces RTC6671 linear detector
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- Discord: https://discord.gg/9qxJNTPSPs
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## Reference Documents
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- `reference/043_OpenOSD-X_REFERENCE.pdf`: original schematic (RTC6705 + RTC6671)
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- `reference/vpd_table.pdf`: VPD calibration table format and example
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- `reference/Connection.png`: system block diagram
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- `reference/BreakoutboardBlockDiagram.pdf`: breakout board block diagram
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- `reference/datasheets/SKY85743-21_full_extraction.md`: complete pinout and specs
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- `reference/datasheets/*.pdf`: component datasheets (STM32G431, RTC6705, LMR51420, NTC)
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- `reference/analog-vtx-market-analysis-2025-2026.md`: market research
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