AllSpiceMirrors/jellyfish-powersupply
0
Fork 0
mirror of https://gitlab.com/hyperglitch/jellyfish.git synced 2025-04-04 09:56:54 +00:00
Files Issues Releases Activity
21a3dedb0c
jellyfish-powersupply/hw/adc.kicad_sch
Igor Brkic 21a3dedb0c routing done 90%, board layout defined
2024-06-22 18:39:47 +02:00

8990 lines
143 KiB
Plaintext
Raw Blame History

1 2 3 4 5 6 1 2 3 4 5 6 D C B A D C B A Date: 2024-04-10 Size: A4 Id: / File: blob_b3bfef375adeec7f9af7bd5c1f948926f73633c7_4062619478.kicad_sch Sheet: / KiCad E.D.A. eeschema 8.0 SPDX-FileCopyrightText: 2024 Igor Brkic <igor@hyperglitch.com> SPDX-License-Identifier: CERN-OHL-S-2.0 Title: JellyfishOPP Rev: 1 HYPERGLITCH Ltd R135 0R C300 100nF C139 10uF TP3 TP4 R132 10k C140 100nF TP2 C136 4.7uF C137 10uF TP5 CF+ 1 GND 2 SD 3 VDD 4 VOUT 6 CRES 7 CF- 8 U35 LM7705 C315 10uF D35 1N4148WS C138 4.7uF C327 100nF R137 10k R139 10k C135 1uF R138 10k D36 1N4148WS R133 0R R134 0R C314 10uF C134 1uF S4B 17 S1B 4 Vss 5 VDD 16 S2B 7 S1A 2 GND 6 D4 18 S4A 19 SEL2 10 D2 8 S2A 9 SEL4 20 D1 3 SEL3 11 SEL1 1 D3 13 S3B 14 S3A 12 U34 TMUX1134 +5.5V +5VA MUX_SW SDO-6 ADC_V- ADC_V- ~{CS1} SDO-4 RDY{slash}STRB1 RDY{slash}STRB2 SCLK SDO-2 ADC_V- SDO-0 SDO-3 ~{PD}{slash}~{RST} SDI SDO-7 SDO-5 SDO-1 CONVST ~{CS2} {CTRL_ADC} ADC_IN4 ADC_IN2 ADC_IN1 ADC_IN3 REFP{slash}2_1 {CTRL_ADC} ADS92X4 #1 ADC_V- IN2- IN2+ IN1- IN1+ SDO-1 ~{CS} SDI SDO-0 SCLK SDO-2 SDO-3 SDO-7 SDO-6 SDO-5 SDO-4 REFP{slash}2 RDY{slash}STRB ~{PD}{slash}~{RST} CONVST ADS92X4 #2 ADC_V- IN2- IN2+ IN1- IN1+ SDO-1 ~{CS} SDI SDO-0 SCLK SDO-2 SDO-3 SDO-7 SDO-6 SDO-5 SDO-4 REFP{slash}2 RDY{slash}STRB ~{PD}{slash}~{RST} CONVST SDO-x pins are Hi-Z when ~{CS} pin is high (ADS92X4 datasheet p3) 4-channel MUX is used in order to match the series resistance on both inputs Test points and 0R resistors added to allow for rewiring to single ADC. EMI shield clips: Harwin S1811-46R Shield example: Masach MS511-20S-NS Negative bias voltage (-0.232V) generator
Ctrl + Scroll to zoom