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Create Diode_Bridge_Vishay_KBPM.kicad_mod ()

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* Create Diode_Bridge_Vishay_KBPM.kicad_mod

* Fab lines to 0.1mm width and courtyard on grid
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evanshultz 2020-08-29 01:46:15 -07:00 committed by GitHub
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commit 953cbf0edc
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Diode_THT.pretty/Diode_Bridge_Vishay_KBPM.kicad_mod Normal file
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(module Diode_Bridge_Vishay_KBPM (layer F.Cu) (tedit 5E9398C8)
(descr "Vishay KBM rectifier package, 3.95mm pitch (http://www.farnell.com/datasheets/2238158.pdf, http://www.cdil.com/s/kbp2005_.pdf)")
(tags "Vishay KBM rectifier diode bridge")
(fp_text reference REF** (at 5.775 -3.5) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Diode_Bridge_Vishay_KBPM (at 5.775 3.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.67 1.4) (end 0.67 2.525) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 5.775 -1.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.89 -2.71) (end -0.69 -2.71) (layer F.SilkS) (width 0.12))
(fp_line (start -1.89 -1.41) (end -1.89 -2.71) (layer F.SilkS) (width 0.12))
(fp_line (start 0.67 -1.4) (end 0.67 -2.52) (layer F.SilkS) (width 0.12))
(fp_line (start 0.67 -2.41) (end 0.67 2.415) (layer F.Fab) (width 0.1))
(fp_line (start -1.7 -2.52) (end -1.7 2.525) (layer F.SilkS) (width 0.12))
(fp_line (start 13.24 -2.52) (end -1.7 -2.52) (layer F.SilkS) (width 0.12))
(fp_line (start 13.25 2.525) (end 13.24 -2.52) (layer F.SilkS) (width 0.12))
(fp_line (start -1.7 2.525) (end 13.25 2.525) (layer F.SilkS) (width 0.12))
(fp_line (start -1.59 -1.41) (end -1.59 2.415) (layer F.Fab) (width 0.1))
(fp_line (start -0.59 -2.41) (end -1.59 -1.41) (layer F.Fab) (width 0.1))
(fp_line (start 13.14 -2.41) (end -0.59 -2.41) (layer F.Fab) (width 0.1))
(fp_line (start 13.14 2.415) (end 13.14 -2.41) (layer F.Fab) (width 0.1))
(fp_line (start -1.59 2.415) (end 13.14 2.415) (layer F.Fab) (width 0.1))
(fp_line (start -1.84 -2.66) (end 13.39 -2.66) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.84 -2.66) (end -1.84 2.67) (layer F.CrtYd) (width 0.05))
(fp_line (start 13.39 2.67) (end 13.39 -2.66) (layer F.CrtYd) (width 0.05))
(fp_line (start 13.39 2.67) (end -1.84 2.67) (layer F.CrtYd) (width 0.05))
(pad 4 thru_hole circle (at 11.55 0) (size 2.2 2.2) (drill 1.2) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 7.7 0) (size 2.2 2.2) (drill 1.2) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 3.85 0) (size 2.2 2.2) (drill 1.2) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at 0 0) (size 2.2 2.2) (drill 1.2) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Diode_THT.3dshapes/Diode_Bridge_Vishay_KBPM.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)