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Correct description in Infineon_PG-DSO-12-9, Infineon_PG-DSO-12-11 (fixes #2588)
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Package_SO.pretty
@ -1,7 +1,7 @@
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(footprint "Infineon_PG-DSO-12-11" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(tedit 5A480096)
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(descr "Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/)")
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(descr "Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/)")
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(tags "PG-DSO")
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(attr smd)
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(fp_text reference "REF**" (at 0 -5.4) (layer "F.SilkS")
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@ -1,7 +1,7 @@
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(footprint "Infineon_PG-DSO-12-9" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(tedit 5A47FBB8)
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(descr "Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/)")
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(descr "Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/)")
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(tags "PG-DSO")
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(attr smd)
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(fp_text reference "REF**" (at 0 -5.4) (layer "F.SilkS")
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