AllSpiceMirrors/kicad-symbols
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kicad-symbols/FPGA_Altera_MAX10.kicad_symdir/10M04SCE144.kicad_sym
cpresser 485804ab03 Update generator_version of all symbols to 10.0 
Using a recent build of KiCad (3eed8b6) with the the variable
KICAD_SEMANTIC_VERSION set to 10.0.0-unknown

This was done with this command
> find . -type d -name "*.kicad_symdir" -exec kicad-cli sym upgrade --force {} \;

And verified with
> git diff --ignore-matching-lines=generator_version
As expected there is no output.

See merge request https://gitlab.com/kicad/libraries/kicad-symbols/-/merge_requests/5413
2026-02-23 13:03:53 +00:00

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(kicad_symbol_lib
(version 20251024)
(generator "kicad_symbol_editor")
(generator_version "10.0")
(symbol "10M04SCE144"
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(in_pos_files yes)
(duplicate_pin_numbers_are_jumpers no)
(property "Reference" "U"
(at -20.574 34.29 0)
(show_name no)
(do_not_autoplace no)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Value" "10M04SCE144"
(at 22.352 34.29 0)
(show_name no)
(do_not_autoplace no)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Footprint" "Package_QFP:EQFP-144-1EP_20x20mm_P0.5mm_EP5x5mm"
(at 0 -5.08 0)
(show_name no)
(do_not_autoplace no)
(hide yes)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Datasheet" "https://www.intel.com/programmable/technical-pdfs/max10-handbook.pdf"
(at 0 -2.54 0)
(show_name no)
(do_not_autoplace no)
(hide yes)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Description" "Intel/Altera MAX 10 FPGA, single supply / compact features, 4000LE, LQFP-144 (Intel EQFP-144)"
(at 0 0 0)
(show_name no)
(do_not_autoplace no)
(hide yes)
(effects
(font
(size 1.27 1.27)
)
)
)
(property private "KLC_S3.1" "Units will not be centered on origin due outline heigth (50 mil based, 'BANK' names need this othewise they will clash with pins)"
(at 0 -7.62 0)
(show_name yes)
(do_not_autoplace no)
(hide yes)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "ki_locked" ""
(at 0 0 0)
(show_name no)
(do_not_autoplace no)
(effects
(font
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)
)
)
(property "ki_keywords" "MAX10 PLD FPGA DSP 12-bit-ADC Flash"
(at 0 0 0)
(show_name no)
(do_not_autoplace no)
(hide yes)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "ki_fp_filters" "*QFP*20x20mm?P0.5mm?EP5x5mm*"
(at 0 0 0)
(show_name no)
(do_not_autoplace no)
(hide yes)
(effects
(font
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)
)
)
(symbol "10M04SCE144_1_1"
(rectangle
(start -21.59 6.35)
(end 21.59 -7.62)
(stroke
(width 0.254)
(type default)
)
(fill
(type background)
)
)
(text "BANK 1A"
(at 0 5.08 0)
(effects
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)
)
)
(pin bidirectional line
(at -25.4 2.54 0)
(length 3.81)
(name "PIN_6"
(effects
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)
)
)
(number "6"
(effects
(font
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)
)
)
(pin bidirectional line
(at -25.4 0 0)
(length 3.81)
(name "PIN_7"
(effects
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)
)
(number "7"
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(pin bidirectional line
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(length 3.81)
(name "PIN_8"
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)
(number "8"
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(pin bidirectional line
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(name "PIN_10"
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(number "10"
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)
(pin bidirectional line
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(length 3.81)
(name "PIN_11"
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)
(number "11"
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)
(pin bidirectional line
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(name "PIN_12"
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)
(number "12"
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(pin bidirectional line
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(name "PIN_13"
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(name "PIN_14"
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(number "14"
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)
(symbol "10M04SCE144_2_1"
(rectangle
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(end 21.59 -7.62)
(stroke
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(type default)
)
(fill
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(text "BANK 1B"
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(symbol "10M04SCE144_3_1"
(rectangle
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(end 21.59 -7.62)
(stroke
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(type default)
)
(fill
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(text "BANK 2"
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(effects
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(name "PIN_26/CLK0n"
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(pin bidirectional line
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(name "PIN_27/CLK0p"
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)
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(pin bidirectional line
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(name "PIN_28/CLK1n"
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(number "28"
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(pin bidirectional line
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(name "PIN_29/CLK1p"
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(number "33"
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(symbol "10M04SCE144_4_1"
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(end 21.59 -12.7)
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)
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(text "BANK 3"
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