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d25ac664f8
Some simulation demos curtesy of Holger Vogt and a new board design curtesy of Pat Deegan
111 lines
3.3 KiB
Plaintext
111 lines
3.3 KiB
Plaintext
* VCA810
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*****************************************************************************
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* (C) Copyright 2012 Texas Instruments Incorporated. All rights reserved.
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*****************************************************************************
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** This model is designed as an aid for customers of Texas Instruments.
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** TI and its licensors and suppliers make no warranties, either expressed
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** or implied, with respect to this model, including the warranties of
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** merchantability or fitness for a particular purpose. The model is
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** provided solely on an "as is" basis. The entire risk as to its quality
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** and performance is with the customer.
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*****************************************************************************
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*
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** Released by: WEBENCH(R) Design Center, Texas Instruments Inc.
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* Part: VCA810
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* Date: 01/15/2014
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* Model Type: All In One
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* Simulator: TINA-TI
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* Simulator Version: 9.3.80.256 SF-TI
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* EVM Order Number: N/A
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* EVM Users Guide: N/A
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* Datasheet: SBOS275F –JUNE 2003–REVISED DECEMBER 2010
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*
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* Model Version: 1.0
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*
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*****************************************************************************
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*
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* Updates:
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*
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* Version 1.0 : Based on Pspice macro netlist w/following comments:
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* "VCA810 VOLTAGE CONTROLLED AMPLIFIER "MACROMODEL" SUBCIRCUIT
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* CREATED 7/30/04 RRS"
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* Release to Web
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*
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*****************************************************************************
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* Notes:
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* 1. The model still missing dc and noise to be added latter
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*****************************************************************************
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*
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* CONNECTIONS: NON-INVERTING INPUT
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* | GROUND
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* | | GAIN CONTROL, VC
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* | | | OUTPUT
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* | | | | POSITIVE SUPPLY VOLTAGE
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* | | | | | NEGATIVE SUPPLY VOLTAGE
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* | | | | | | INVERTING INPUT
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* | | | | | | |
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.SUBCKT VCA810 1 2 3 5 6 7 8
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* CONTROL VOLTAGE
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Q1 7 3 13 P
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C1 3 7 1E-12
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Q2 7 2 13 P
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I1 6 13 384E-6
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Q3 10 11 7 N
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R2 6 10 2
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E1 11 7 POLY(1) (3,0) 0.45 -0.11911
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G3 12 0 POLY(1) (10,6) 0 1
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R3 12 0 139
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C3 12 0 1.145E-9
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G1 6 7 POLY(1) (6,10) 13.5102E-3 -0.489
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G2 0 7 POLY(1) (6,10) 1.7958E-3 2.939E-3
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* INPUT STAGE
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Q01 20 1 26 N
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C01 1 0 1E-12
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Q02 21 8 26 N
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C02 8 0 1E-12
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R01 20 27 1E3
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D01 29 27 DX
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D03 6 29 DX
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R02 21 28 1E3
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D02 24 28 DX
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D04 6 24 DX
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IS 26 7 2.32E-3
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* GAIN STAGE 1
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R31 31 0 1E6
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G31 31 0 POLY(2) (8,1) (12,0) 0 0 0 0 1.1E-6 0
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* GAIN STAGE 2
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R41 41 44 20E3
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C41 41 44 230.25E-15
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G41 41 44 0 31 1E-3
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D41 41 43 DX
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E41 44 43 POLY(1) (3,0) 100.2 14.87
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R42 41 45 20E3
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C42 41 45 230.25E-15
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G42 41 45 0 31 1E-3
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D42 42 41 DX
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E42 42 45 POLY(1) (3,0) 100.2 14.87
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E43 44 0 6 0 20
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E44 0 45 0 7 20
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* OUTPUT STAGE
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E51 55 0 41 0 50E-3
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D53 55 51 DX
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D54 52 55 DX
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D55 6 53 DX
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D56 6 54 DX
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D57 7 53 DZ
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D58 7 54 DZ
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G54 53 7 5 55 50E-3
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G53 54 7 55 5 50E-3
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V53 51 5 0.1833
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V54 5 52 0.1833
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G51 5 6 6 55 50E-3
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G52 7 5 55 7 50E-3
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R53 6 5 20
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R54 7 5 20
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.MODEL N NPN (IS=1E-12 BF=193)
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.MODEL P PNP (IS=1E-12 BF=96)
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.MODEL DX D(IS=1E-15 BV=200)
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.MODEL DZ D(IS=1E-15 BV=50)
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.ENDS
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*$
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