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d25ac664f8
Some simulation demos curtesy of Holger Vogt and a new board design curtesy of Pat Deegan
437 lines
14 KiB
Plaintext
437 lines
14 KiB
Plaintext
*$
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* OPA1641
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*************************************************************************************************
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* (C) Copyright 2018 Texas Instruments Incorporated. All rights reserved.
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*************************************************************************************************
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** This model is designed as an aid for customers of Texas Instruments.
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** TI and its licensors and suppliers make no warranties, either expressed
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** or implied, with respect to this model, including the warranties of
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** merchantability or fitness for a particular purpose. The model is
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** provided solely on an "as is" basis. The entire risk as to its quality
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** and performance is with the customer
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*************************************************************************************************
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*
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* This model is subject to change without notice. Texas Instruments
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* Incorporated is not responsible for updating this model.
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*
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*************************************************************************************************
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*
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** Released by: Online Design Tools, Texas Instruments Inc.
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* Part: OPA1641
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* Date: 08FEB2019
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* Model Type: Generic (suitable for all analysis types)
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* EVM Order Number: N/A
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* EVM Users Guide: N/A
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* Datasheet: SBOS484D -DECEMBER 2009-REVISED APRIL 2016
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* Created with Green-Williams-Lis Op Amp Macro-model Architecture
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*
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* Model Version: Final 1.1
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*
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*****************************************************************************
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*
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* Updates:
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*
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* Final 1.1
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* Added Unique subckt name, removed Claw ABS.
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* Simplified subckt for current noise.
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*
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* Final 1.0
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* Release to Web.
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*
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****************************************************************************
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* Model Usage Notes:
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* 1. The following parameters are modeled:
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* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol)
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* UNITY GAIN BANDWIDTH (GBW)
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* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)
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* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)
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* DIFFERENTIAL INPUT IMPEDANCE (Zid)
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* COMMON-MODE INPUT IMPEDANCE (Zic)
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* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)
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* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)
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* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)
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* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)
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* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)
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* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
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* QUIESCENT CURRENT (Iq)
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* SETTLING TIME VS. CAPACITIVE LOAD (ts)
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* SLEW RATE (SR)
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* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD
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* LARGE SIGNAL RESPONSE
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* OVERLOAD RECOVERY TIME (tor)
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* INPUT BIAS CURRENT (Ib)
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* INPUT OFFSET CURRENT (Ios)
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* INPUT OFFSET VOLTAGE (Vos)
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* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
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* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)
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* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)
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* 2. Model represent the device operating at room temperature only. No temperature dependency is modeled
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******************************************************
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.subckt OPA1641 IN+ IN- VCC VEE OUT
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******************************************************
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.model R_NOISELESS RES (TCE=0 T_ABS=-273.15)
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******************************************************
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I_OS ESDn MID 4e-12
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I_B 30 MID 2e-12
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V_GRp 45 MID 56
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V_GRn 46 MID -55
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V_ISCp 39 MID 36.5994
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V_ISCn 40 MID -28.98
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V_ORn 38 VCLP -11.9328
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V11 44 37 0
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V_ORp 36 VCLP 11.8605
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V12 43 35 0
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V4 27 OUT 0
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VCM_MIN 67 VEE_B -0.1
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VCM_MAX 68 VCC_B -3.5
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I_Q VCC VEE 0.0018
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V_OS 75 30 0.000995
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XU5 ESDp ESDn VCC VEE ESD_0_OPA1641
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XU4 19 ESDp MID PSRR_CMRR_0_OPA1641
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XU3 20 VEE_B MID PSRR_CMRR_1_OPA1641
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XU2 21 VCC_B MID PSRR_CMRR_2_OPA1641
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XU1 23 22 CLAMP VSENSE CLAW_CLAMP CL_CLAMP 24 26 27 MID AOL_ZO_0_OPA1641
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C28 31 MID 1P
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R77 32 31 R_NOISELESS 100
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C27 33 MID 1P
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R76 34 33 R_NOISELESS 100
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R75 MID 35 R_NOISELESS 1
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GVCCS8 35 MID 36 MID -1
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R74 37 MID R_NOISELESS 1
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GVCCS7 37 MID 38 MID -1
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Xi_nn ESDn MID FEMT_0_OPA1641
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Xi_np MID 30 FEMT_0_OPA1641
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Xe_n ESDp 30 VNSE_0_OPA1641
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XIQPos VIMON MID MID VCC VCCS_LIMIT_IQ_0_OPA1641
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XIQNeg MID VIMON VEE MID VCCS_LIMIT_IQ_0_OPA1641
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C_DIFF ESDp ESDn 8e-12
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XCL_AMP 39 40 VIMON MID 41 42 CLAMP_AMP_LO_0_OPA1641
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SOR_SWp CLAMP 43 CLAMP 43 S_VSWITCH_1
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SOR_SWn 44 CLAMP 44 CLAMP S_VSWITCH_1
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XGR_AMP 45 46 47 MID 48 49 CLAMP_AMP_HI_0_OPA1641
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R39 45 MID R_NOISELESS 1T
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R37 46 MID R_NOISELESS 1T
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R42 VSENSE 47 R_NOISELESS 1M
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C19 47 MID 1F
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R38 48 MID R_NOISELESS 1
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R36 MID 49 R_NOISELESS 1
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R40 48 50 R_NOISELESS 1M
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R41 49 51 R_NOISELESS 1M
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C17 50 MID 1F
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C18 MID 51 1F
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XGR_SRC 50 51 CLAMP MID VCCS_LIM_GR_0_OPA1641
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R21 41 MID R_NOISELESS 1
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R20 MID 42 R_NOISELESS 1
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R29 41 52 R_NOISELESS 1M
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R30 42 53 R_NOISELESS 1M
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C9 52 MID 1F
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C8 MID 53 1F
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XCL_SRC 52 53 CL_CLAMP MID VCCS_LIM_4_0_OPA1641
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R22 39 MID R_NOISELESS 1T
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R19 MID 40 R_NOISELESS 1T
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XCLAWp VIMON MID 54 VCC_B VCCS_LIM_CLAW+_0_OPA1641
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XCLAWn MID VIMON VEE_B 55 VCCS_LIM_CLAW-_0_OPA1641
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R12 54 VCC_B R_NOISELESS 1K
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R16 54 56 R_NOISELESS 1M
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R13 VEE_B 55 R_NOISELESS 1K
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R17 57 55 R_NOISELESS 1M
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C6 57 MID 1F
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C5 MID 56 1F
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G2 VCC_CLP MID 56 MID -1M
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R15 VCC_CLP MID R_NOISELESS 1K
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G3 VEE_CLP MID 57 MID -1M
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R14 MID VEE_CLP R_NOISELESS 1K
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XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID 58 59 CLAMP_AMP_LO_0_OPA1641
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R26 VCC_CLP MID R_NOISELESS 1T
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R23 VEE_CLP MID R_NOISELESS 1T
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R25 58 MID R_NOISELESS 1
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R24 MID 59 R_NOISELESS 1
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R27 58 60 R_NOISELESS 1M
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R28 59 61 R_NOISELESS 1M
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C11 60 MID 1F
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C10 MID 61 1F
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XCLAW_SRC 60 61 CLAW_CLAMP MID VCCS_LIM_3_0_OPA1641
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H2 34 MID V11 -1
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H3 32 MID V12 1
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C12 SW_OL MID 100P
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R32 62 SW_OL R_NOISELESS 100
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R31 62 MID R_NOISELESS 1
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XOL_SENSE MID 62 33 31 OL_SENSE_0_OPA1641
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S1 24 26 SW_OL MID S_VSWITCH_3
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H1 63 MID V4 1K
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S7 VEE OUT VEE OUT S_VSWITCH_4
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S6 OUT VCC OUT VCC S_VSWITCH_4
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R11 MID 64 R_NOISELESS 1T
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R18 64 VOUT_S R_NOISELESS 100
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C7 VOUT_S MID 1N
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E5 64 MID OUT MID 1
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C13 VIMON MID 1N
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R33 63 VIMON R_NOISELESS 100
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R10 MID 63 R_NOISELESS 1T
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R47 65 VCLP R_NOISELESS 100
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C24 VCLP MID 100P
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E4 65 MID CL_CLAMP MID 1
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C4 23 MID 1F
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R9 23 66 R_NOISELESS 1M
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R7 MID 67 R_NOISELESS 1T
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R6 68 MID R_NOISELESS 1T
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R8 MID 66 R_NOISELESS 1
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XVCM_CLAMP 69 MID 66 MID 68 67 VCCS_EXT_LIM_0_OPA1641
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E1 MID 0 70 0 1
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R89 VEE_B 0 R_NOISELESS 1
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R5 71 VEE_B R_NOISELESS 1M
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C3 71 0 1F
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R60 70 71 R_NOISELESS 1MEG
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C1 70 0 1
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R3 70 0 R_NOISELESS 1T
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R59 72 70 R_NOISELESS 1MEG
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C2 72 0 1F
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R4 VCC_B 72 R_NOISELESS 1M
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R88 VCC_B 0 R_NOISELESS 1
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G17 VEE_B 0 VEE 0 -1
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G16 VCC_B 0 VCC 0 -1
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R_PSR 73 69 R_NOISELESS 1K
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G_PSR 69 73 21 20 -1M
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R2 22 ESDn R_NOISELESS 1M
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R1 73 74 R_NOISELESS 1M
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R_CMR 75 74 R_NOISELESS 1K
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G_CMR 74 75 19 MID -1M
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C_CMn ESDn MID 6e-12
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C_CMp MID ESDp 6e-12
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R53 ESDn MID R_NOISELESS 1T
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R52 MID ESDp R_NOISELESS 1T
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R35 IN- ESDn R_NOISELESS 10M
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R34 IN+ ESDp R_NOISELESS 10M
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.MODEL S_VSWITCH_1 VSWITCH (RON=10e-3 ROFF=1e9 VON=10e-3 VOFF=0)
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.MODEL S_VSWITCH_3 VSWITCH (RON=1e-3 ROFF=1e9 VON=900e-3 VOFF=800e-3)
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.MODEL S_VSWITCH_4 VSWITCH (RON=50 ROFF=1e12 VON=500e-3 VOFF=450e-3)
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.ENDS OPA1641
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*
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.SUBCKT ESD_0_OPA1641 ESDp ESDn VCC VEE
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S2 ESDn VCC ESDn VCC S_VSWITCH_1
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S4 VEE ESDn VEE ESDn S_VSWITCH_1
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S3 ESDp VCC ESDp VCC S_VSWITCH_1
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S5 VEE ESDp VEE ESDp S_VSWITCH_1
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.MODEL S_VSWITCH_1 VSWITCH (RON=50 ROFF=1e12 VON=500e-3 VOFF=450e-3)
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.ENDS
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*
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.SUBCKT PSRR_CMRR_0_OPA1641 psrr_in psrr_vccb mid
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.model R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
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R74 mid psrr_in R_NOISELESS 1
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G_2 psrr_in mid 4 mid -36.1316
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R2b mid 4 R_NOISELESS 2846443.8473
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C2a 4 5 1.0178e-14
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R73 5 4 R_NOISELESS 100MEG
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R49 mid 5 R_NOISELESS 1
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GVCCS7 5 mid 6 mid -1
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R2a mid 6 R_NOISELESS 11367.1456
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C1a 6 7 2.2769e-12
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R48 7 6 R_NOISELESS 100MEG
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G_1 7 mid psrr_vccb mid -0.0021692
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Rsrc mid 7 R_NOISELESS 1
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.ENDS
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*
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.SUBCKT PSRR_CMRR_1_OPA1641 psrr_in psrr_vccb psrr_mid
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.model R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
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R80 psrr_mid psrr_in R_NOISELESS 33.3333
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C27 psrr_in 4 1.5915e-09
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R79 4 psrr_in R_NOISELESS 100MEG
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GVCCS8 4 psrr_mid psrr_vccb psrr_mid -0.13345
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R78 psrr_mid 4 R_NOISELESS 1
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.ENDS
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*
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.SUBCKT PSRR_CMRR_2_OPA1641 psrr_in psrr_vccb psrr_mid
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.model R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
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R80 psrr_mid psrr_in R_NOISELESS 45.5638
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C27 psrr_in 4 1.5877e-09
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R79 4 psrr_in R_NOISELESS 100MEG
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GVCCS8 4 psrr_mid psrr_vccb psrr_mid -0.30495
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R78 psrr_mid 4 R_NOISELESS 1
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.ENDS
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*
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.SUBCKT VCCS_LIM_2_0_OPA1641 VC+ VC- IOUT+ IOUT-
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.PARAM GAIN = 0.021535
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.PARAM IPOS = 0.6168
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.PARAM INEG = -0.6168
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G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
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.ENDS
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*
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.SUBCKT VCCS_LIM_1_0_OPA1641 VC+ VC- IOUT+ IOUT-
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.PARAM GAIN = 1E-4
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.PARAM IPOS = .5
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.PARAM INEG = -.5
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G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
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.ENDS
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*
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.SUBCKT AOL_ZO_0_OPA1641 AOL_INP AOL_INN CLAMP VSENSE CLAW_CLAMP CL_CLAMP ZO_CLEFT ZO_CRIGHT ZO_OUT MID
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.MODEL R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
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C1_A0 CLAMP MID 3.034e-08
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R4_A0 MID CLAMP R_NOISELESS 1MEG
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XVCCS_LIM_2_A0 4_A0 MID MID CLAMP VCCS_LIM_2_0_OPA1641
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R3_A0 MID 4_A0 R_NOISELESS 1MEG
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XVCCS_LIM_1_A0 AOL_INP AOL_INN MID 4_A0 VCCS_LIM_1_0_OPA1641
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R4_VS VSENSE MID R_NOISELESS 1K
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GVCCS4_VS VSENSE MID CLAMP MID -1M
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C2_A2 out2 MID 6.6315e-14
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R3_A2 out2 MID R_NOISELESS 1MEG
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GVCCS3_A2 out2 MID VSENSE MID -1U
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C3_A3 4_A3 out3 4.9379e-12
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GVCCS4_A3 4_A3 MID out2 MID -639.8821
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R4_A3 4_A3 MID R_NOISELESS 1
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R5_A3 out3 4_A3 R_NOISELESS 10K
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R6_A3 out3 MID R_NOISELESS 15.6523
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C2_A4 out4 MID 1.0015e-15
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R3_A4 out4 MID R_NOISELESS 1MEG
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GVCCS3_A4 out4 MID out3 MID -1U
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C2_A5 out5 MID 8.1759e-16
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R3_A5 out5 MID R_NOISELESS 1MEG
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GVCCS3_A5 out5 MID out4 MID -1U
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C2_A6 out6 MID 8.1759e-16
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R3_A6 out6 MID R_NOISELESS 1MEG
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GVCCS3_A6 out6 MID out5 MID -1U
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C2_A7 out7 MID 8.1759e-16
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R3_A7 out7 MID R_NOISELESS 1MEG
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GVCCS3_A7 out7 MID out6 MID -1U
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C2_A8 out8 MID 2.8937e-16
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R3_A8 out8 MID R_NOISELESS 1MEG
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GVCCS3_A8 out8 MID out7 MID -1U
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R4_CC CLAW_CLAMP MID R_NOISELESS 1K
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GVCCS4_CC CLAW_CLAMP MID out8 MID -1M
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R4_CL CL_CLAMP MID R_NOISELESS 1K
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GVCCS4_CL CL_CLAMP MID CLAW_CLAMP MID -1M
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G_Aol_Zo Zo_Cleft MID CL_CLAMP ZO_OUT -89.0517
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GVCCS1_1 outz1 MID Zo_Cright MID -83.6706
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C1_1 Zo_Cleft Zo_Cright 9.5519e-06
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R2_1 Zo_Cright MID R_NOISELESS 120.9619
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R1_1 Zo_Cright Zo_Cleft R_NOISELESS 10K
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Rdc_1 Zo_Cleft MID R_NOISELESS 1
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GVCCS2_2 outz2 MID net2 MID -1
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C2_2 5_2 MID 3.9653e-12
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R5_2 net2 5_2 R_NOISELESS 10K
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R4_2 net2 outz1 R_NOISELESS 165044.5518
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R7_2 outz1 MID R_NOISELESS 1
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R1_3 2_3 MID R_NOISELESS 1
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R11_3 5_3 MID R_NOISELESS 6.7534
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C4_3 5_3 outz2 1.6422e-13
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R10_3 5_3 outz2 R_NOISELESS 10K
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XVCVS_LIM_1 5_3 MID MID 2_3 VCCS_LIM_ZO_0_OPA1641
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R9_3 outz2 MID R_NOISELESS 1
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Rdummy MID ZO_OUT R_NOISELESS 1584.893
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Rx ZO_OUT 2_3 R_NOISELESS 15848.93
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.ENDS
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*
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.SUBCKT VCCS_LIM_ZO_0_OPA1641 VC+ VC- IOUT+ IOUT-
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.PARAM GAIN = 1481.7407
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.PARAM IPOS = 1160.123E3
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.PARAM INEG = -918.604E3
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G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
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.ENDS
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*
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.SUBCKT FEMT_0_OPA1641 1 2
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.PARAM NVRF=0.8
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.PARAM RNVF={1.184*PWR(NVRF,2)}
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E1 3 0 5 0 10
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R1 5 0 {RNVF}
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R2 5 0 {RNVF}
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G1 1 2 3 0 1E-6
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.ENDS
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*
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.SUBCKT VNSE_0_OPA1641 1 2
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.PARAM FLW=0.1
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.PARAM NLF=46.4919
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.PARAM NVR=5.0539
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.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
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.PARAM RNV={1.184*PWR(NVR,2)}
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.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
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I1 0 7 10E-3
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I2 0 8 10E-3
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D1 7 0 DVN
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D2 8 0 DVN
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E1 3 6 7 8 {GLF}
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R1 3 0 1E9
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R2 3 0 1E9
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R3 3 6 1E9
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E2 6 4 5 0 10
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R4 5 0 {RNV}
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R5 5 0 {RNV}
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R6 3 4 1E9
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R7 4 0 1E9
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E3 1 2 3 4 1
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.ENDS
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*
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.SUBCKT VCCS_LIMIT_IQ_0_OPA1641 VC+ VC- IOUT+ IOUT-
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.PARAM GAIN = 1E-3
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G1 IOUT- IOUT+ VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )}
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.ENDS
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*
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.SUBCKT CLAMP_AMP_LO_0_OPA1641 VC+ VC- VIN COM VO+ VO-
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.PARAM G=1
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GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
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GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
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.ENDS
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*
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.SUBCKT CLAMP_AMP_HI_0_OPA1641 VC+ VC- VIN COM VO+ VO-
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.PARAM G=10
|
|
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
|
|
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
|
|
.ENDS
|
|
*
|
|
.SUBCKT VCCS_LIM_GR_0_OPA1641 VC+ VC- IOUT+ IOUT-
|
|
.PARAM GAIN = 1
|
|
.PARAM IPOS = 1.2336E1
|
|
.PARAM INEG = -1.2336E1
|
|
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
|
|
.ENDS
|
|
*
|
|
.SUBCKT VCCS_LIM_4_0_OPA1641 VC+ VC- IOUT+ IOUT-
|
|
.PARAM GAIN = 1
|
|
.PARAM IPOS = 0.2352E1
|
|
.PARAM INEG = -0.231E1
|
|
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
|
|
.ENDS
|
|
*
|
|
.SUBCKT VCCS_LIM_CLAW+_0_OPA1641 VC+ VC- IOUT+ IOUT-
|
|
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
|
|
+(0, 2.1186E-4)
|
|
+(12.1998, 0.0003505)
|
|
+(24.3996, 0.00037005)
|
|
+(32.5328, 0.00049199)
|
|
+(32.9395, 0.00050932)
|
|
+(33.7528, 0.00055193)
|
|
+(34.5661, 0.0006607)
|
|
+(35.3794, 0.00086684)
|
|
+(36.1927, 0.0014151)
|
|
+(36.5994, 0.0018692)
|
|
.ENDS
|
|
*
|
|
.SUBCKT VCCS_LIM_CLAW-_0_OPA1641 VC+ VC- IOUT+ IOUT-
|
|
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
|
|
+(0, 2.1186E-4)
|
|
+(9.66, 0.00036002)
|
|
+(19.3199, 0.00036763)
|
|
+(25.7599, 0.00037452)
|
|
+(26.0819, 0.00037487)
|
|
+(26.7259, 0.00037556)
|
|
+(27.3699, 0.00037625)
|
|
+(28.0139, 0.00037694)
|
|
+(28.6579, 0.00072576)
|
|
+(28.9799, 0.0018986)
|
|
.ENDS
|
|
*
|
|
.SUBCKT VCCS_LIM_3_0_OPA1641 VC+ VC- IOUT+ IOUT-
|
|
.PARAM GAIN = 1
|
|
.PARAM IPOS = 0.1176E1
|
|
.PARAM INEG = -0.1155E1
|
|
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
|
|
.ENDS
|
|
*
|
|
.SUBCKT OL_SENSE_0_OPA1641 COM SW+ OLN OLP
|
|
GSW+ COM SW+ VALUE = {IF((V(OLN,COM)>10E-3 | V(OLP,COM)>10E-3),1,0)}
|
|
.ENDS
|
|
*
|
|
.SUBCKT VCCS_EXT_LIM_0_OPA1641 VIN+ VIN- IOUT- IOUT+ VP+ VP-
|
|
.PARAM GAIN = 1
|
|
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
|
|
.ENDS
|
|
*
|