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Merge branch 'master' of github.com:parallella/parallella-hw

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This commit is contained in:
Andreas Olofsson 2016-10-14 17:42:53 -04:00
commit 9affa5eacf
48 changed files with 15225 additions and 0 deletions

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G04 ================== begin FILE IDENTIFICATION RECORD ==================*
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20,1,0.0,0.0,.0045,.00375,-.0045,0.0*
1,1,0.0,.00375,-.0045*
1,1,0.0,.0024,-.00135*
20,1,0.0,.0024,-.00135,-.0024,-.00135,0.0*
1,1,0.0,-.0024,-.00135*
%
%ADD10MACRO10*%
%LPD*%
G75*
G54D10*
X1779106Y1431250D03*
X1775000D03*
X1790000Y1507500D03*
X1794106D03*
X1793750Y1501250D03*
X1797856D03*
X1796250Y1516250D03*
X1800356D03*
X1818750Y1352500D03*
X1814644D03*
X1813750Y1356250D03*
X1809644D03*
X1810000Y1362500D03*
X1805894D03*
X1822480Y1418730D03*
X1802500Y1521250D03*
X1806606D03*
X1839840Y1313750D03*
X1840000Y1301250D03*
X1830000D03*
Y1313750D03*
X1844647Y1338750D03*
X1838750Y1345000D03*
X1842856D03*
X1831606Y1351250D03*
X1827500D03*
X1839997Y1365000D03*
X1844103D03*
X1844997Y1378750D03*
X1833299Y1402500D03*
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X1833296Y1413750D03*
X1828750Y1471250D03*
X1840000Y1481250D03*
X1841250Y1495000D03*
X1830000Y1506250D03*
X1850000Y1285000D03*
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X1857144Y1280000D03*
X1861250D03*
X1859530Y1313750D03*
X1850000D03*
X1860000Y1301250D03*
X1850000D03*
X1857147Y1330000D03*
X1861253D03*
X1848753Y1338750D03*
X1861247D03*
X1865353D03*
X1849103Y1378750D03*
X1853689Y1379708D03*
X1857795D03*
X1855000Y1388750D03*
X1859106D03*
X1860000Y1481250D03*
X1850000D03*
X1854997Y1486250D03*
X1859103D03*
X1866247Y1515000D03*
X1850000Y1495000D03*
X1860000D03*
X1878750Y1287500D03*
X1871250Y1313750D03*
X1877500D03*
X1868750Y1301250D03*
X1870000Y1310000D03*
X1874106D03*
X1885000Y1312500D03*
X1889002Y1311463D03*
X1873394Y1333750D03*
X1877500D03*
X1880000Y1331250D03*
X1884106D03*
X1885897Y1328750D03*
X1867500Y1351250D03*
X1871606D03*
X1867500Y1387500D03*
X1871606D03*
X1870272Y1431250D03*
X1874378D03*
X1883397Y1437500D03*
X1887503D03*
X1883486Y1447411D03*
X1887592D03*
X1885411Y1460836D03*
X1878750Y1481250D03*
X1868813D03*
X1870353Y1515000D03*
X1880071Y1514926D03*
X1884177D03*
X1878750Y1495000D03*
X1871250D03*
X1874207Y1517500D03*
X1878313D03*
X1887723Y1516826D03*
X1897856Y1292500D03*
X1893750D03*
X1891250Y1308750D03*
X1895356D03*
X1895000Y1303750D03*
X1899106D03*
X1890003Y1328750D03*
X1889517Y1460836D03*
X1908902Y1486195D03*
X1891829Y1516826D03*
X1926606Y1440000D03*
X1922500D03*
X1921606Y1450000D03*
X1917500D03*
X1916683Y1461333D03*
X1912494Y1461250D03*
X1913008Y1486195D03*
X2026200Y1387250D03*
G54D11*
X1821540Y1314880D03*
Y1495980D03*
X1895550Y1314880D03*
Y1495980D03*
X2026200Y1359150D03*
M02*

296
interrupts_connected/Design Files/GND2.art Normal file
View File

@ -0,0 +1,296 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
G04 Layout Name: PC2230_6.brd*
G04 Film Name: GND2*
G04 File Format: Gerber RS274X*
G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
G04 *
G04 Layer: BOARD GEOMETRY/OUTLINE*
G04 Layer: ETCH/GND2*
G04 Layer: PIN/GND2*
G04 Layer: VIA CLASS/GND2*
G04 *
G04 Offset: (0.00 0.00)*
G04 Mirror: No*
G04 Mode: Positive*
G04 Rotation: 0*
G04 FullContactRelief: No*
G04 UndefLineWidth: 0.00*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
%FSLAX25Y25*MOIN*%
%IR0*IPPOS*OFA0.00000B0.00000*MIA0B0*SFA1.00000B1.00000*%
%ADD11C,.041*%
%ADD10C,.018*%
%ADD12C,.006*%
%ADD13C,.03404*%
%ADD14C,.05704*%
G75*
%LPD*%
G75*
G36*
G01X1770001Y1256251D02*
Y1531249D01*
X1949999D01*
Y1256251D01*
X1779852D01*
Y1264852D01*
X1773848D01*
Y1256251D01*
X1770001D01*
G37*
%LPC*%
G75*
G36*
G01X1879968Y1517102D02*
G03X1880302Y1516612I389J-94D01*
G02X1878416Y1515324I-231J-1686D01*
G03X1878082Y1515814I-389J94D01*
G02X1879968Y1517102I231J1686D01*
G37*
G36*
G01X1884229Y1329086D02*
G03X1883888Y1329562I-392J79D01*
G02X1885774Y1330914I218J1688D01*
G03X1886115Y1330438I392J-79D01*
G02X1884229Y1329086I-218J-1688D01*
G37*
G36*
G01X1879639Y1332913D02*
G02X1878337Y1331611I361J-1663D01*
G03X1877861Y1332087I-391J85D01*
G02X1879163Y1333389I-361J1663D01*
G03X1879639Y1332913I391J-85D01*
G37*
G36*
G01X1891055Y1310441D02*
G02X1889625Y1309256I195J-1691D01*
G03X1889197Y1309772I-382J119D01*
G02X1890627Y1310957I-195J1691D01*
G03X1891055Y1310441I382J-119D01*
G37*
G54D13*
X1779106Y1431250D03*
X1775000D03*
X1790000Y1507500D03*
X1794106D03*
X1793750Y1501250D03*
X1797856D03*
X1796250Y1516250D03*
X1800356D03*
X1818750Y1352500D03*
X1814644D03*
X1813750Y1356250D03*
X1809644D03*
X1810000Y1362500D03*
X1805894D03*
X1822480Y1418730D03*
X1802500Y1521250D03*
X1806606D03*
X1830000Y1301250D03*
Y1313750D03*
X1844647Y1338750D03*
X1838750Y1345000D03*
X1842856D03*
X1831606Y1351250D03*
X1827500D03*
X1839997Y1365000D03*
X1844103D03*
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X1857144Y1280000D03*
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X1857147Y1330000D03*
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X1848753Y1338750D03*
X1861247D03*
X1865353D03*
X1849103Y1378750D03*
X1853689Y1379708D03*
X1857795D03*
X1855000Y1388750D03*
X1859106D03*
X1854997Y1486250D03*
X1859103D03*
X1866247Y1515000D03*
X1870000Y1310000D03*
X1874106D03*
X1885000Y1312500D03*
X1873394Y1333750D03*
X1867500Y1351250D03*
X1871606D03*
X1867500Y1387500D03*
X1871606D03*
X1870272Y1431250D03*
X1874378D03*
X1883397Y1437500D03*
X1887503D03*
X1883486Y1447411D03*
X1887592D03*
X1885411Y1460836D03*
X1870353Y1515000D03*
X1884177Y1514926D03*
X1874207Y1517500D03*
X1887723Y1516826D03*
X1897856Y1292500D03*
X1893750D03*
X1895356Y1308750D03*
X1895000Y1303750D03*
X1899106D03*
X1890003Y1328750D03*
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X1908902Y1486195D03*
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X1926606Y1440000D03*
X1922500D03*
X1921606Y1450000D03*
X1917500D03*
X1916683Y1461333D03*
X1912494Y1461250D03*
X1913008Y1486195D03*
G54D14*
X1821540Y1314880D03*
Y1495980D03*
X1895550Y1314880D03*
Y1495980D03*
%LPD*%
G75*
G54D10*
X1779106Y1431250D03*
X1775000D03*
X1790000Y1507500D03*
X1794106D03*
X1793750Y1501250D03*
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Y1313750D03*
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X1842856D03*
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X1866247Y1515000D03*
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X1870000Y1310000D03*
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X1873394Y1333750D03*
X1877500D03*
X1880000Y1331250D03*
X1884106D03*
X1885897Y1328750D03*
X1867500Y1351250D03*
X1871606D03*
X1867500Y1387500D03*
X1871606D03*
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X1868813D03*
X1870353Y1515000D03*
X1880071Y1514926D03*
X1884177D03*
X1878750Y1495000D03*
X1871250D03*
X1874207Y1517500D03*
X1878313D03*
X1887723Y1516826D03*
X1897856Y1292500D03*
X1893750D03*
X1891250Y1308750D03*
X1895356D03*
X1895000Y1303750D03*
X1899106D03*
X1890003Y1328750D03*
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X1891829Y1516826D03*
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X1921606Y1450000D03*
X1917500D03*
X1916683Y1461333D03*
X1912494Y1461250D03*
X1913008Y1486195D03*
G54D11*
X1821540Y1314880D03*
Y1495980D03*
X1895550Y1314880D03*
Y1495980D03*
G54D12*
G01X1778053Y1262917D02*
X1777673Y1263417D01*
X1777230Y1263667D01*
X1776723Y1263750D01*
X1776090Y1263583D01*
X1775647Y1263167D01*
X1775520Y1262667D01*
X1775583Y1262167D01*
X1775837Y1261750D01*
X1777103Y1260917D01*
X1777673Y1260333D01*
X1778053Y1259500D01*
X1778180Y1258750D01*
X1775520D01*
M02*

367
interrupts_connected/Design Files/GND3.art Normal file
View File

@ -0,0 +1,367 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
G04 Layout Name: PC2230_6.brd*
G04 Film Name: GND3*
G04 File Format: Gerber RS274X*
G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
G04 *
G04 Layer: BOARD GEOMETRY/OUTLINE*
G04 Layer: ETCH/GND3*
G04 Layer: PIN/GND3*
G04 Layer: VIA CLASS/GND3*
G04 *
G04 Offset: (0.00 0.00)*
G04 Mirror: No*
G04 Mode: Positive*
G04 Rotation: 0*
G04 FullContactRelief: No*
G04 UndefLineWidth: 0.00*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
%FSLAX25Y25*MOIN*%
%IR0*IPPOS*OFA0.00000B0.00000*MIA0B0*SFA1.00000B1.00000*%
%ADD11C,.041*%
%ADD10C,.018*%
%ADD12C,.02*%
%ADD13C,.006*%
%ADD14C,.03404*%
%ADD15C,.05704*%
G75*
%LPD*%
G75*
G36*
G01X1770001Y1256251D02*
Y1531249D01*
X1949999D01*
Y1256251D01*
X1783652D01*
Y1264852D01*
X1777648D01*
Y1256251D01*
X1770001D01*
G37*
%LPC*%
G75*
G36*
G01X1830024Y1472524D02*
X1835098Y1467450D01*
Y1413750D01*
G02X1831494I-1802J0D01*
G01Y1465958D01*
X1827476Y1469976D01*
G02X1830024Y1472524I1274J1274D01*
G37*
G36*
G01X1826948Y1495746D02*
Y1505746D01*
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G02X1831274Y1504976I1274J-1274D01*
G01X1830552Y1504254D01*
Y1494254D01*
X1824282Y1487984D01*
Y1418730D01*
G02X1820678I-1802J0D01*
G01Y1489476D01*
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G37*
G36*
G01X1879968Y1517102D02*
G03X1880302Y1516612I389J-94D01*
G02X1878416Y1515324I-231J-1686D01*
G03X1878082Y1515814I-389J94D01*
G02X1879968Y1517102I231J1686D01*
G37*
G36*
G01X1884229Y1329086D02*
G03X1883888Y1329562I-392J79D01*
G02X1885774Y1330914I218J1688D01*
G03X1886115Y1330438I392J-79D01*
G02X1884229Y1329086I-218J-1688D01*
G37*
G36*
G01X1879639Y1332913D02*
G02X1878337Y1331611I361J-1663D01*
G03X1877861Y1332087I-391J85D01*
G02X1879163Y1333389I-361J1663D01*
G03X1879639Y1332913I391J-85D01*
G37*
G36*
G01X1891055Y1310441D02*
G02X1889625Y1309256I195J-1691D01*
G03X1889197Y1309772I-382J119D01*
G02X1890627Y1310957I-195J1691D01*
G03X1891055Y1310441I382J-119D01*
G37*
G36*
G01X1834496Y1299448D02*
X1830000D01*
G02X1828198Y1301250I0J1802D01*
G01Y1313004D01*
X1821948Y1319254D01*
Y1393750D01*
G02X1825552I1802J0D01*
G01Y1352671D01*
G03X1826246Y1352401I400J1D01*
G02Y1350099I1254J-1151D01*
G03X1825552Y1349829I-294J-271D01*
G01Y1320746D01*
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G02X1831802Y1313750I-1273J-1274D01*
G01Y1303052D01*
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Y1349519D01*
G03X1832572Y1349848I-400J0D01*
G02Y1352652I-966J1402D01*
G03X1833198Y1352981I226J329D01*
G01Y1400053D01*
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G02X1834573Y1403774I1274J1274D01*
G01X1836802Y1401545D01*
Y1346421D01*
G03X1837496Y1346151I400J1D01*
G02Y1343849I1254J-1151D01*
G03X1836802Y1343579I-294J-271D01*
G01Y1301754D01*
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G37*
G54D14*
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G54D15*
X1821540Y1314880D03*
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X1895550Y1314880D03*
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%LPD*%
G75*
G54D10*
X1779106Y1431250D03*
X1775000D03*
X1790000Y1507500D03*
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X1793750Y1501250D03*
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M02*

44
interrupts_connected/Design Files/PASTE_BOT.art Normal file
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@ -0,0 +1,44 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
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G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
G04 *
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G04 *
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G04 Mirror: No*
G04 Mode: Positive*
G04 Rotation: 0*
G04 FullContactRelief: No*
G04 UndefLineWidth: 6.00*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
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M02*

160
interrupts_connected/Design Files/PASTE_TOP.art Normal file
View File

@ -0,0 +1,160 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
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G04 Film Name: PASTE_TOP*
G04 File Format: Gerber RS274X*
G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
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G04 Layer: PACKAGE GEOMETRY/PASTEMASK_TOP*
G04 Layer: BOARD GEOMETRY/OUTLINE*
G04 *
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G04 ================== end FILE IDENTIFICATION RECORD ====================*
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M02*

124
interrupts_connected/Design Files/PC2230_6-1-4.drl Normal file
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@ -0,0 +1,124 @@
;LEADER: 12
;HEADER:
;CODE : ASCII
;FILE : PC2230_6-1-4.drl for ... layers TOP and BOTTOM
; Holesize 1. = 8.000000 Tolerance = +0.000000/-0.000000 PLATED MILS Quantity = 112
; Holesize 2. = 40.000000 Tolerance = +0.000000/-0.000000 NON_PLATED MILS Quantity = 4
%
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M30

93
interrupts_connected/Design Files/SILK_BOT.art Normal file
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@ -0,0 +1,93 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
G04 Layout Name: PC2230_6.brd*
G04 Film Name: SILK_BOT*
G04 File Format: Gerber RS274X*
G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
G04 *
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G04 Layer: PACKAGE GEOMETRY/SILKSCREEN_BOTTOM*
G04 Layer: BOARD GEOMETRY/SILKSCREEN_BOTTOM*
G04 Layer: BOARD GEOMETRY/OUTLINE*
G04 *
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G04 Mirror: No*
G04 Mode: Positive*
G04 Rotation: 0*
G04 FullContactRelief: No*
G04 UndefLineWidth: 6.00*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
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M02*

1273
interrupts_connected/Design Files/SILK_TOP.art Normal file
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File diff suppressed because it is too large Load Diff

159
interrupts_connected/Design Files/SOLDER_BOT.art Normal file
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@ -0,0 +1,159 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
G04 Layout Name: PC2230_6.brd*
G04 Film Name: SOLDER_BOT*
G04 File Format: Gerber RS274X*
G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
G04 *
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G04 Layer: PIN/SOLDERMASK_BOTTOM*
G04 Layer: PACKAGE GEOMETRY/SOLDERMASK_BOTTOM*
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G04 Layer: BOARD GEOMETRY/OUTLINE*
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G04 Mode: Positive*
G04 Rotation: 0*
G04 FullContactRelief: No*
G04 UndefLineWidth: 6.00*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
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M02*

275
interrupts_connected/Design Files/SOLDER_TOP.art Normal file
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@ -0,0 +1,275 @@
G04 ================== begin FILE IDENTIFICATION RECORD ==================*
G04 Layout Name: PC2230_6.brd*
G04 Film Name: SOLDER_TOP*
G04 File Format: Gerber RS274X*
G04 File Origin: Cadence Allegro 16.6-P004*
G04 Origin Date: Wed Mar 09 13:19:19 2016*
G04 *
G04 Layer: VIA CLASS/SOLDERMASK_TOP*
G04 Layer: PIN/SOLDERMASK_TOP*
G04 Layer: PACKAGE GEOMETRY/SOLDERMASK_TOP*
G04 Layer: BOARD GEOMETRY/SOLDERMASK_TOP*
G04 Layer: BOARD GEOMETRY/OUTLINE*
G04 *
G04 Offset: (0.00 0.00)*
G04 Mirror: No*
G04 Mode: Positive*
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G04 FullContactRelief: No*
G04 UndefLineWidth: 6.00*
G04 ================== end FILE IDENTIFICATION RECORD ====================*
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X1805894D03*
X1822480Y1418730D03*
X1802500Y1521250D03*
X1806606D03*
X1839840Y1313750D03*
X1840000Y1301250D03*
X1830000D03*
Y1313750D03*
X1844647Y1338750D03*
X1838750Y1345000D03*
X1842856D03*
X1831606Y1351250D03*
X1827500D03*
X1839997Y1365000D03*
X1844103D03*
X1844997Y1378750D03*
X1833299Y1402500D03*
X1823750Y1393750D03*
X1833296Y1413750D03*
X1828750Y1471250D03*
X1840000Y1481250D03*
X1841250Y1495000D03*
X1830000Y1506250D03*
X1850000Y1285000D03*
X1854106D03*
X1857144Y1280000D03*
X1861250D03*
X1859530Y1313750D03*
X1850000D03*
X1860000Y1301250D03*
X1850000D03*
X1857147Y1330000D03*
X1861253D03*
X1848753Y1338750D03*
X1861247D03*
X1865353D03*
X1849103Y1378750D03*
X1853689Y1379708D03*
X1857795D03*
X1855000Y1388750D03*
X1859106D03*
X1860000Y1481250D03*
X1850000D03*
X1854997Y1486250D03*
X1859103D03*
X1866247Y1515000D03*
X1850000Y1495000D03*
X1860000D03*
X1878750Y1287500D03*
X1871250Y1313750D03*
X1877500D03*
X1868750Y1301250D03*
X1870000Y1310000D03*
X1874106D03*
X1885000Y1312500D03*
X1889002Y1311463D03*
X1873394Y1333750D03*
X1877500D03*
X1880000Y1331250D03*
X1884106D03*
X1885897Y1328750D03*
X1867500Y1351250D03*
X1871606D03*
X1867500Y1387500D03*
X1871606D03*
X1870272Y1431250D03*
X1874378D03*
X1883397Y1437500D03*
X1887503D03*
X1883486Y1447411D03*
X1887592D03*
X1885411Y1460836D03*
X1878750Y1481250D03*
X1868813D03*
X1870353Y1515000D03*
X1880071Y1514926D03*
X1884177D03*
X1878750Y1495000D03*
X1871250D03*
X1874207Y1517500D03*
X1878313D03*
X1887723Y1516826D03*
X1897856Y1292500D03*
X1893750D03*
X1891250Y1308750D03*
X1895356D03*
X1895000Y1303750D03*
X1899106D03*
X1890003Y1328750D03*
X1889517Y1460836D03*
X1908902Y1486195D03*
X1891829Y1516826D03*
X1926606Y1440000D03*
X1922500D03*
X1921606Y1450000D03*
X1917500D03*
X1916683Y1461333D03*
X1912494Y1461250D03*
X1913008Y1486195D03*
G54D11*
X1821540Y1314880D03*
Y1495980D03*
X1895550Y1314880D03*
Y1495980D03*
G54D12*
X1830000Y1294800D03*
X1831970D03*
X1833940D03*
X1835910D03*
X1837870D03*
X1839840D03*
X1841810D03*
X1843780D03*
X1830000Y1320000D03*
X1831970D03*
X1833940D03*
X1835910D03*
X1837870D03*
X1839840D03*
X1841810D03*
X1843780D03*
X1830000Y1475900D03*
X1831970D03*
X1833940D03*
X1835910D03*
X1837870D03*
X1839840D03*
X1841810D03*
X1843780D03*
X1830000Y1501100D03*
X1831970D03*
X1833940D03*
X1835910D03*
X1837870D03*
X1839840D03*
X1841810D03*
X1843780D03*
X1845750Y1294800D03*
X1847720D03*
X1849680D03*
X1851650D03*
X1853620D03*
X1855590D03*
X1857560D03*
X1859530D03*
X1861500D03*
X1863460D03*
X1865430D03*
X1845750Y1320000D03*
X1847720D03*
X1849680D03*
X1851650D03*
X1853620D03*
X1855590D03*
X1857560D03*
X1859530D03*
X1861500D03*
X1863460D03*
X1865430D03*
X1845750Y1475900D03*
X1847720D03*
X1849680D03*
X1851650D03*
X1853620D03*
X1855590D03*
X1857560D03*
X1859530D03*
X1861500D03*
X1863460D03*
X1865430D03*
X1845750Y1501100D03*
X1847720D03*
X1849680D03*
X1851650D03*
X1853620D03*
X1855590D03*
X1857560D03*
X1859530D03*
X1861500D03*
X1863460D03*
X1865430D03*
X1867400Y1294800D03*
X1869370D03*
X1871340D03*
X1873310D03*
X1875280D03*
X1877240D03*
X1879210D03*
X1881180D03*
X1883150D03*
X1885120D03*
X1887090D03*
X1867400Y1320000D03*
X1869370D03*
X1871340D03*
X1873310D03*
X1875280D03*
X1877240D03*
X1879210D03*
X1881180D03*
X1883150D03*
X1885120D03*
X1887090D03*
X1867400Y1475900D03*
X1869370D03*
X1871340D03*
X1873310D03*
X1875280D03*
X1877240D03*
X1879210D03*
X1881180D03*
X1883150D03*
X1885120D03*
X1887090D03*
X1867400Y1501100D03*
X1869370D03*
X1871340D03*
X1873310D03*
X1875280D03*
X1877240D03*
X1879210D03*
X1881180D03*
X1883150D03*
X1885120D03*
X1887090D03*
G54D13*
G01X1768750Y1255000D02*
Y1532500D01*
X1951250D01*
Y1255000D01*
X1768750D01*
M02*

1089
interrupts_connected/Design Files/TOP.art Normal file
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File diff suppressed because it is too large Load Diff

40
interrupts_connected/Design Files/aperture.log Normal file
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@ -0,0 +1,40 @@
Wed Mar 09 13:17:10 2016 Page 1
Photoplot log file
Results from aperture table.
INPUT-UNITS INCHES
WHEEL 1
LINE 4 D32
LINE 6 D29
LINE 8 D31
LINE 10 D30
LINE 12 D36
LINE 20 D34
LINE 25 D33
LINE 380 D35
LINE 396 D37
LINE 412 D38
CIRCLE 5 D22
CIRCLE 18 D10
CIRCLE 24 D25
CIRCLE 30 D23
CIRCLE 33 D11
CIRCLE 35 D13
CIRCLE 41 D17
CIRCLE 44 D26
CIRCLE 50 D19
CIRCLE 60 D18
SQUARE 40 0.00000 D14
SQUARE 50 0.00000 D16
SQUARE 60 0.00000 D15
RECTANGLE 9.4 78.7 0.00000 D20
RECTANGLE 19.4 88.7 0.00000 D21
RECTANGLE 78.7 9.4 0.00000 D28
RECTANGLE 88.7 19.4 0.00000 D27
FLASH AB00 0.00000 D24
FLASH TR_45_25 0.00000 D12

35
interrupts_connected/Design Files/art_aper.txt Normal file
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@ -0,0 +1,35 @@
INPUT-UNITS INCHES
WHEEL 1
LINE 4 D32
LINE 6 D29
LINE 8 D31
LINE 10 D30
LINE 12 D36
LINE 20 D34
LINE 25 D33
LINE 380 D35
LINE 396 D37
LINE 412 D38
CIRCLE 5 D22
CIRCLE 18 D10
CIRCLE 24 D25
CIRCLE 30 D23
CIRCLE 33 D11
CIRCLE 35 D13
CIRCLE 41 D17
CIRCLE 44 D26
CIRCLE 50 D19
CIRCLE 60 D18
SQUARE 40 0.00000 D14
SQUARE 50 0.00000 D16
SQUARE 60 0.00000 D15
RECTANGLE 9.4 78.7 0.00000 D20
RECTANGLE 19.4 88.7 0.00000 D21
RECTANGLE 78.7 9.4 0.00000 D28
RECTANGLE 88.7 19.4 0.00000 D27
FLASH AB00 0.00000 D24
FLASH TR_45_25 0.00000 D12

10
interrupts_connected/Design Files/art_param.txt Normal file
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@ -0,0 +1,10 @@
DEVICE-TYPE GERBER_RS274X
OUTPUT-UNITS INCHES
FILM-SIZE 2400000 1600000
FORMAT 2.5
ABORT-ON-ERROR NO
SCALE 1
SUPPRESS-LEAD-ZEROES YES
SUPPRESS-TRAIL-ZEROES NO
SUPPRESS-EQUAL YES
UNDEF-APT-CONT NO

13
interrupts_connected/Design Files/dbdoctor.log Normal file
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@ -0,0 +1,13 @@
(---------------------------------------------------------------------)
( )
( DBDOCTOR )
( )
( Drawing : PC2230_6.brd )
( Software Version : 16.6P004 )
( Date/Time : Wed Mar 09 13:19:18 2016 )
( )
(---------------------------------------------------------------------)
0 warnings, 0 errors detected, 0 errors could be fixed.

55
interrupts_connected/Design Files/extract.log Normal file
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@ -0,0 +1,55 @@
#
# ncdrill_view.txt
#
COMPOSITE_PAD
#
# The only DRILL_HOLE_TYPE really wanted is CIRCLE_DRILL.
#
# Other DRILL_HOLE_TYPE's of OVAL_SLOT and RECTANGLE_SLOT are
# included as well though so that we can at least warn of the
# existence of slot holes in a design when NCTAPE is run.
#
# Slot hole types would have their major dimension in DRILL_HOLE_NAME
# and their minor dimension in DRILL_HOLE_NAME2. CIRCLE_DRILL types
# will simply have DRILL_HOLE_NAME2 set to the same value as in
# DRILL_HOLE_NAME. DRILL_HOLE_NONSTANDARD, and multi-drill fields such
# DRILL_ARRAY_LOCATIONS do not apply to slot holes. DRILL_FIGURE_ROTATION
# for slot holes will contain the rotation to be applied to the slot
# hole, with the assumption of 0 degrees being the major dimension
# of the slot hole along the X axis.
#
DRILL_HOLE_TYPE = CIRCLE_DRILL
OR
DRILL_HOLE_TYPE = OVAL_SLOT
OR
DRILL_HOLE_TYPE = RECTANGLE_SLOT
#
DRILL_HOLE_TYPE
DRILL_HOLE_NAME
# DRILL_HOLE_NAME2
# DRILL_FIGURE_ROTATION
DRILL_HOLE_NONSTANDARD
DRILL_HOLE_PLATING
DRILL_HOLE_POSTOL
DRILL_HOLE_NEGTOL
DRILL_HOLE_X
DRILL_HOLE_Y
DRILL_ARRAY_LOCATIONS
START_LAYER_NAME
END_LAYER_NAME
START_LAYER_NUMBER
END_LAYER_NUMBER
REFDES
PIN_NUMBER
SYM_X
SYM_Y
BACKDRILL_TOP_FROM
BACKDRILL_TOP_LAYER
BACKDRILL_BOTTOM_FROM
BACKDRILL_BOTTOM_LAYER
DRILL_TOP_NAME
DRILL_TOP_NUMBER
DRILL_BOTTOM_NAME
DRILL_BOTTOM_NUMBER
EMBEDDED_ATTACH
EMBEDDED_LAYER

23
interrupts_connected/Design Files/nc_param.txt Normal file
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@ -0,0 +1,23 @@
INTEGER-PLACES 2
DECIMAL-PLACES 5
X-OFFSET 0.000000
Y-OFFSET 0.000000
FEEDRATE 1
COORDINATES ABSOLUTE
OUTPUT-UNITS ENGLISH
TOOL-ORDER INCREASING
REPEAT-CODES YES
SUPPRESS-LEAD-ZEROES NO
SUPPRESS-TRAIL-ZEROES NO
SUPPRESS-EQUAL NO
TOOL-SELECT NO
OPTIMIZE_DRILLING NO
ENHANCED_EXCELLON NO
HEADER none
LEADER 12
CODE ASCII
SEPARATE NO
SEPARATE-ROUTING NO
DRILLING LAYER-PAIR
BACKDRILL NO
CAVITY NO

57
interrupts_connected/Design Files/ncdrill.log Normal file
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@ -0,0 +1,57 @@
(---------------------------------------------------------------------)
( )
( NC DRILL Log )
( )
( Drawing : #Taaaaaf06728.tmp )
( Software Version : 16.6P004 )
( Date/Time : Wed Mar 09 13:16:47 2016 )
( )
(---------------------------------------------------------------------)
Processing NC Parameters file 'nc_param.txt' ...
NC PARAMETERS
-------------
FORMAT 2.5
MACHINE-OFFSET x:0.000000 y:0.000000
FEEDRATE 1
COORDINATES ABSOLUTE
OUTPUT-UNITS ENGLISH
TOOL-ORDER INCREASING
REPEAT-CODES YES
SUPPRESS-LEAD-ZEROES NO
SUPPRESS-TRAIL-ZEROES NO
SUPPRESS-EQUAL NO
TOOL-SELECT NO
HEADER none
LEADER 12
CODE ASCII
SEPARATE NO
SEPARATE-ROUTING NO
OPTIMIZE_DRILLING NO
ENHANCED_EXCELLON NO
SCALE 1.000000
WARNING(SPMHMF-358): Design precision is the same as that of the drill output file data.
WARNING(SPMHMF-359): Data rounding errors may still be possible.
Drill files being output to directory 'Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro' ...
'PC2230_6-1-4.drl' created for holes connecting TOP and BOTTOM
--------------------------------------------------------------
Num Size +/- Tolerance Plating Quantity
1. 8.0000 0.0000/ 0.0000 PLATED 112
2. 40.0000 0.0000/ 0.0000 NON_PLATED 4
---- Total holes: 116
---- Total head travel: 6.31 feet (1.92 meters)

17
interrupts_connected/Design Files/nclegend.log Normal file
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@ -0,0 +1,17 @@
(---------------------------------------------------------------------)
( )
( DRILL LEGEND )
( )
( Drawing : PC2230_6.brd )
( Software Version : 16.6P004 )
( Date/Time : Wed Mar 09 13:16:31 2016 )
( )
(---------------------------------------------------------------------)
Begin processing of drill legend template file 'C:/Cadence/SPB_16.6/share/pcb/text/nclegend/default-mil.dlt' ...
End of drill legend template file processing.
Begin processing drill holes.
No errors detected in processing holes.
End processing drill holes.

381
interrupts_connected/Design Files/photoplot.log Normal file
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@ -0,0 +1,381 @@
(---------------------------------------------------------------------)
( )
( ARTWORK LOG )
( )
( Drawing : PC2230_6.brd )
( Software Version : 16.6P004 )
( Date/Time : Wed Mar 09 13:19:18 2016 )
( )
(---------------------------------------------------------------------)
---- Photoplot outline rectangle not found ... using drawing extents
Results from parameter file ...
DEVICE-TYPE GERBER_RS274X
OUTPUT-UNITS INCHES
FILM-SIZE 2400000 1600000
FORMAT 2.5
ABORT-ON-ERROR NO
SCALE 1
SUPPRESS-LEAD-ZEROES YES
SUPPRESS-TRAIL-ZEROES NO
SUPPRESS-EQUAL YES
UNDEF-APT-CONT NO
================================================================
PROCESSING FILM < TOP >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/TOP.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 0.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
WARNING: Film contains DRC error(s).
WARNING: rectangle or unfilled shape composed 0 width line found at (17687.50 12550.00)
... ignored.
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.00800 DARK
CIRCLE 0.01000 DARK
CIRCLE 0.01800 DARK
CIRCLE 0.02000 DARK
CIRCLE 0.04100 DARK
RECTANGLE 0.00940 x 0.07870 0.000 NO DARK
TOP created with warnings
================================================================
PROCESSING FILM < GND2 >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/GND2.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 0.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
WARNING: rectangle or unfilled shape having Multiple 0 width lines; all will be treated the same as the first.
... ignored.
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.01800 DARK
CIRCLE 0.04100 DARK
GND2 created with warnings
================================================================
PROCESSING FILM < GND3 >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/GND3.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 0.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.01800 DARK
CIRCLE 0.02000 DARK
CIRCLE 0.04100 DARK
GND3 created.
================================================================
PROCESSING FILM < BOTTOM >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/BOTTOM.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.00800 DARK
CIRCLE 0.01800 DARK
CIRCLE 0.02000 DARK
CIRCLE 0.04100 DARK
SQUARE 0.04000 0.000 NO DARK
BOTTOM created.
================================================================
PROCESSING FILM < DRAWING >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/DRAWING.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 0.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
WARNING: 0 width line found at (19812.50 13732.00)
... ignored.
WARNING: Multiple 0 width lines; all will be treated the same as the first.
... ignored.
WARNING: text composed 0 width line found at (20262.00 14106.50)
... ignored.
WARNING: text having Multiple 0 width lines; all will be treated the same as the first.
... ignored.
APERTURES USED: NONE
DRAWING created with warnings
================================================================
PROCESSING FILM < SILK_TOP >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/SILK_TOP.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
SILK_TOP created.
================================================================
PROCESSING FILM < SILK_BOT >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/SILK_BOT.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.01200 DARK
SILK_BOT created.
================================================================
PROCESSING FILM < PASTE_TOP >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/PASTE_TOP.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.04100 DARK
RECTANGLE 0.00940 x 0.07870 0.000 NO DARK
PASTE_TOP created.
================================================================
PROCESSING FILM < PASTE_BOT >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/PASTE_BOT.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.04100 DARK
SQUARE 0.04000 0.000 NO DARK
PASTE_BOT created.
================================================================
PROCESSING FILM < SOLDER_TOP >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/SOLDER_TOP.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.03500 DARK
CIRCLE 0.05000 DARK
RECTANGLE 0.01940 x 0.08870 0.000 NO DARK
SOLDER_TOP created.
================================================================
PROCESSING FILM < SOLDER_BOT >
TO FILE < Z:/sysarc/ela (132.68.55.11v_sysarc_s$q_dighomehome)/PCB/ALLEGRO/SHEET/Oz_Shmueli/aviv&ohad_25_11_15/1/allegro/SOLDER_BOT.art > ...
================================================================
FILM PARAMETERS :
---------------------------------------------------------
Undefined line width 6.00
Mirror code NONE
Rotate angle NONE
Offset x: 0.00
Offset y: 0.00
Plot negative NO
Suppress unconnected internal pads NO
Draw holes only NO
APERTURES USED:
---------------------------------------------------------
TYPE SIZE/NAME ROT MIRROR MODE
---------------------------------------------------------
CIRCLE 0.00600 DARK
CIRCLE 0.03500 DARK
CIRCLE 0.05000 DARK
SQUARE 0.05000 0.000 NO DARK
SOLDER_BOT created.
------------------------------------------------------
SUMMARY:
TOP created with warnings
GND2 created with warnings
GND3 created.
BOTTOM created.
DRAWING created with warnings
SILK_TOP created.
SILK_BOT created.
PASTE_TOP created.
PASTE_BOT created.
SOLDER_TOP created.
SOLDER_BOT created.
ARTWORK finished

BIN
interrupts_connected/Epiphany Cluster Technical Report.pdf Normal file
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interrupts_connected/Final Presentation.ppsx Normal file
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85
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Interrupts Connected Systems
=====================================================================
This project uses interrupts to test
communication between multiple parallella boards
June 2016
Designed in the Parallel Systems Laboratory,
The Faculty of Electrical Engineering,
Technion Instittute of Technology.
Student: Aviv Burshtein
Instructor: Oz Shmueli
Academic Supervisor: Prof. Tsahi Birk
http://psl.eelabs.technion.ac.il/
Overview
=======================================================================
This project demonstrates the scalability of the Parallella board, by allowing an Epiphany Mesh connection .
Can be used with up to 8 Parallella boards without any changes to the Zynq.
Works with the esdk 2015.1 version and the respective FPGA builds.
Note that in order to use this code one must first connect the boards and set COREID as Explained in the PDF in this folder
Design Files
=========================================================================
This project contains the following components:
master/ - The folder to be used only from the master board - assuming coreid = (32,8) (or 808 in hex)
src/ - The source files
Debug - Binaries.
build.sh - Shell script for building the project on master side
run.sh - Shell script for running the project on master side
slave/ - the folder to be used on any of the slave boards - i.e. coreid = (36,8) (or 908 in hex)
src/ - the source files
Debug - binaries.
build.sh - shell script for building the project on slave side
run.sh - shell script for running the project on slave side
edit_hdf.bash - shell script that edits the HDF file according to location of Epiphany in the mesh
Design Files/ - design files for a costum PCB E-link connector
Epiphany Cluster Technical Report.pdf - Full technical report about this project. To cite this work please use "A.Burshtein ,"Parallella Epiphany Cluster", Parallel Systems Laboratory, Technion Institute of Technology, 2016."
Set Up Your Epiphany Cluster.pdf - A user guide for reconstructing the cluster.
Final Presentation.ppsx - An overview presentation
mem_map_routh_map.xlsx - General Parallella memory map
Interrupts connected.tar- .tar code library
Prior to Building the project
=============================
Execute the next line in the command prompt
$ sudo ./edit_hdf.sh
The correct usage will be explained in the script output
In the correct directory (master or slave):
==========================================
Building the project
====================
At the command prompt, type:
$ ./build.sh
Running the project
===================
At the command prompt, type:
$ ./run.sh

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interrupts_connected/Set Up Your Epiphany Cluster.pdf Normal file
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