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Parallella board design files
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Andreas.Olofsson a6bcdf844c Designed my first board in Kicad "for fun"! 
-Version 5. All in all, the experience was quite good.
-Awesome: github based footprints
-Not so great: caching methods, updating footprints. I still don't get it??
-From never having layed out a board before to gerber out to mfg in less than 20 hours is a testiment to KiCad!! Board has 4 layers, multiple power domains, and over 200 signals. The push and shove router us awesome!.
-Of course it could all be garbage...we'll know in a couple of weeks.
 		2018-06-10 22:54:54 -04:00
aafm Cleanup 2016-09-23 13:36:46 -04:00
archive Clarifying naming restriction 2016-02-03 10:56:51 -05:00
buddy Adding updated buddy source files 2017-07-09 17:22:15 -04:00
docs Resizing 2015-06-24 12:40:17 -04:00
footprints Adding a Kicad footprint library 2018-06-10 22:51:54 -04:00
kvision Adding more pictures (via Emil) 2016-04-29 11:34:42 -04:00
meta_breakout Designed my first board in Kicad "for fun"! 2018-06-10 22:54:54 -04:00
meta_carrier Fixes to various meta board issues 2018-04-23 08:40:26 -04:00
meta_module Splitting module and carrier for meta 2017-10-01 09:19:19 -04:00
paracase Adding physical case picture 2016-11-23 12:29:47 -05:00
paracluster Reorg 2016-11-23 10:01:40 -05:00
paralib Reorg 2016-11-23 10:01:40 -05:00
paralime Reorg 2016-11-23 10:01:40 -05:00
parallella Reorg 2017-01-07 12:50:44 -05:00
pararf Reorg 2016-11-23 10:01:40 -05:00
parasdr Adding manufacturing files 2017-05-17 21:52:38 -04:00
paratemplate Cleanup 2016-11-23 10:05:17 -05:00
paratile Cleanup old files 2017-10-01 09:23:00 -04:00
porcupine Fixing typo on south connector diagram 2016-12-28 14:52:17 -05:00
symbols Adding a KiCad symbols library for Samtec connector 2018-06-10 22:52:41 -04:00
.gitignore Filtering KiCad Junk 2018-06-10 22:53:30 -04:00
.gitmodules Added external repo fpgahdl_xilinx from analog devices. 2014-05-16 14:54:00 -04:00
CONTRIBUTING.md Starting work on a proper README file.. 2015-04-09 09:59:54 -04:00
LICENSE Copyright transfer 2016-04-11 13:47:02 -04:00
README.md Cleanup old files 2017-10-01 09:23:00 -04:00

README.md

alt tag PARALLELLA: Supercomputing for Everyone

This repository contains open source board and FPGA designs associated with the Parallella project.

Directory

Board Description CAD Status
parallella Parallella Cadence Production
porcupine Parallella Breakout Board KiCad Production
meta Epiphany 4096-core System Cadence Prototype
buddy Epiphany-V Evaluation Board Cadence Prototype
paracase Aluminum Case SolidWorks Production
parasdr SDR adapter Board Cadence Production
kvision Stereo Vision Board Altium Prototype
paralime Myriad-RF daughter Board KiCad Prototype
paracluster Cluster Board N/A Prototype
paralib CAD librares Various Prouction
paratemplate Daugher Card Template KiCad Production
paratile Breakout Board Eagle Prototype
aafm Epiphany-III FMC Board KiCad Production
archive Old Parallella stuff N/A Obsolete

FPGA Design Sources

All Parallella related FPGA sources have been moved to the OH! library library and released under MIT license.

License

Board design files are released under the Creative Common Share Alike license unlesss otherwise specified.

How to do a pull-request

  1. Fork this repository to your personal github account using the 'fork' button 2. above
  2. Clone your 'parallella-hw' fork to a local computer using 'git clone'
  3. Create a new sub-directory at the root of the repo
  4. Add your project files with the appropriate license clearly stated
  5. Add a README.md file (see the skeleton directory for a template)
  6. Use git add-->git commit-->git push to add changes to your fork of 'parallella-examples'
  7. Submit a pull request by clicking the 'pull request' button on YOUR github 'parallella-examples' repo.