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mirror of https://github.com/parallella/parallella-hw.git synced 2024-11-24 03:34:40 +00:00
parallella-hw/archive/boards/gen1.1/firmware
Andreas Olofsson 046706db8a Reorg
2016-02-03 00:43:14 -05:00
..
parallella.bin Reorg 2016-02-03 00:43:14 -05:00
parallella.bit.bin Reorg 2016-02-03 00:43:14 -05:00
ps7_init.tcl Reorg 2016-02-03 00:43:14 -05:00
README Reorg 2016-02-03 00:43:14 -05:00
stub.tcl Reorg 2016-02-03 00:43:14 -05:00

--------------------------------------------------------------------------

This file describes how to reprogram the content of the 128Mb
QSPI boot flash on the Parallella board.

-------------------------------------------------------------------------
Directory Content:

parallella.bin 		  (bootable flash image)
parallella.bit.bin	  (u-boot loadable bitstream)
fsbl.elf 		  (First Stage Boot Loader)
uboot.elf 		  (U-Boot application)
stub.tcl 		  (tcl script for putting the CPU in debug mode)
ps7_init.tcl 		  (FSBL settings as tcl script for JTAG operation)

The u-boot.elf is compiled from the parallella-uboot repository using the arm
gcc compiler.

The fsbl.elf is generated from the Xilinx tool chain

The parallella fpga bit files are generated by the Xilinx tool chain.

-------------------------------------------------------------------------- 

Pre-requisites:
-Xilinx Platform USB Cable II
-Serial port console cable
-Xilinx tools installed

--------------------------------------------------------------------------

1.  Make sure you have xilinx tools installed and you have the 
    correct path set. For example:

    my-machine:~> source /opt/Xilinx/14.4/ISE_DS/settings64.csh
    my-machine:~> set path = (/opt/Xilinx/14.4/ISE_DS/PlanAhead/bin $path)

2.  Connect a console cable to the three pin serial port header and a computer.
    running a console application such as putty or tera term.

3.  Connect the Xilinx Platform USB II cable to the JTAG PEC_POWER pins. (Note
    that you will need a PEC_POWER breakout board for this). Connect the
    JTAG cable to the Linux based computer running the Xilinx software. There
    may be a driver conflict between the Xilinx cable and the serial cable so
    the safe bet is to connect the cables in step 2 and 3 to separate computers.

4.  Power on the board

5.  Start the JTAG debugger on machine connected to JTAG cable:

    my-machine:~>XMD

6.  Enter the following command sequence in XMD to run the u-boot application
    through the JTAG loader:

    XMD% connect arm hw
    XMD% source ./ps7_init.tcl
    XMD% ps7_init
    XMD% init_user
    XMD% source ./stub.tcl
    XMD% target 64
    XMD% dow u-boot.elf
    XMD% con

7.  Insert an SD card with a file called "parallella.bin" on boot partition.

8.  In the serial port console program enter the following sequence:
    (Note: Takes several minutes, be patient)

    mmc info
    fatload mmc 0 0x4000000 parallella.bin
    sf probe 0 0 0
    sf erase 0 0x1000000
    sf write 0x4000000 0 0x$filesize

9.  Power off board and take out the SD card.

9.  Set the ethernet address
    zynq-uboot> set ethaddr 04 4F 8B 00 00 66
    zynq-uboot> saveenv

10. Power down board

11. At this point the board is ready for general use.