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38 lines
1.2 KiB
Plaintext
38 lines
1.2 KiB
Plaintext
###############################################################
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## Location constraints for the Parallella-I board
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## 3/12/14 F. Huettig
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####
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## This file defines pin locations & standards for the Parallella-I
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## and Zynq 7020. See the file parallella_z70x0_loc.ucf
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## for all other pins.
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###############################################################
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##################################
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# IOs to be used with zc7020 ONLY
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##################################
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NET "GPIO_P[12]" LOC = "Y12";
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NET "GPIO_N[12]" LOC = "Y13";
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NET "GPIO_P[13]" LOC = "W11";
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NET "GPIO_N[13]" LOC = "Y11";
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NET "GPIO_P[14]" LOC = "V11";
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NET "GPIO_N[14]" LOC = "V10";
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NET "GPIO_P[15]" LOC = "T9" ;
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NET "GPIO_N[15]" LOC = "U10";
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NET "GPIO_P[16]" LOC = "W10";
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NET "GPIO_N[16]" LOC = "W9" ;
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NET "GPIO_P[17]" LOC = "U9" ;
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NET "GPIO_N[17]" LOC = "U8" ;
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NET "GPIO_P[18]" LOC = "V8" ;
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NET "GPIO_N[18]" LOC = "W8" ;
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NET "GPIO_P[19]" LOC = "Y9" ;
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NET "GPIO_N[19]" LOC = "Y8" ;
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NET "GPIO_P[20]" LOC = "Y7" ;
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NET "GPIO_N[20]" LOC = "Y6" ;
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NET "GPIO_P[21]" LOC = "U7" ;
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NET "GPIO_N[21]" LOC = "V7" ;
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NET "GPIO_P[22]" LOC = "V6" ;
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NET "GPIO_N[22]" LOC = "W6" ;
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NET "GPIO_P[23]" LOC = "T5" ;
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NET "GPIO_N[23]" LOC = "U5" ;
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