mirror of
https://github.com/parallella/parallella-hw.git
synced 2024-11-24 03:34:40 +00:00
139 lines
4.8 KiB
Plaintext
139 lines
4.8 KiB
Plaintext
###############################################################
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## Location constraints for the Parallella-I board
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## 3/12/14 F. Huettig
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####
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## This file defines pin locations & standards for the Parallella-I
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## and Zynq 7010 or 7020. See the file parallella_z7020_loc.ucf
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## for pins added with the 7020.
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## Timing constraints are defined elsewhere.
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###############################################################
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# NOTE: IOSTANDARDS for e-link and gpio have been removed
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# from these files. IOSTANDARDS are to be set in the
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# verilog instead.
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#######################
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# HDMI constraints
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#######################
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NET HDMI_D[8] LOC = Y18 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[9] LOC = W18 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[10] LOC = V18 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[11] LOC = V15 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[12] LOC = R18 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[13] LOC = P18 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[14] LOC = Y19 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[15] LOC = W19 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[16] LOC = W15 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[17] LOC = T19 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[18] LOC = R19 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[19] LOC = P19 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[20] LOC = W20 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[21] LOC = V20 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[22] LOC = U20 | IOSTANDARD = LVCMOS25;
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NET HDMI_D[23] LOC = T20 | IOSTANDARD = LVCMOS25;
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NET HDMI_CLK LOC = R17 | IOSTANDARD = LVCMOS25;
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NET HDMI_VSYNC LOC = V17 | IOSTANDARD = LVCMOS25;
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NET HDMI_HSYNC LOC = T17 | IOSTANDARD = LVCMOS25;
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NET HDMI_DE LOC = Y17 | IOSTANDARD = LVCMOS25;
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NET HDMI_SPDIF LOC = Y16 | IOSTANDARD = LVCMOS25;
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NET HDMI_INT LOC = P20 | IOSTANDARD = LVCMOS25;
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#####################
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# I2C
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#####################
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NET PS_I2C_SCL LOC = N18 | IOSTANDARD = LVCMOS25;
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NET PS_I2C_SDA LOC = N17 | IOSTANDARD = LVCMOS25;
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#####################
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# MISC
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#####################
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NET TURBO_MODE LOC = R16 | IOSTANDARD = LVCMOS25;
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NET PROG_IO LOC = N20 | IOSTANDARD = LVCMOS25;
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#####################
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# Epiphany Interface
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#####################
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NET "RXI_CCLK_P" LOC = "H16";
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NET "RXI_CCLK_N" LOC = "H17";
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NET "DSP_RESET_N" LOC = "G14" | IOSTANDARD = LVCMOS25 | DRIVE = 4;
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#NET "DSP_FLAG" LOC = "J15" | IOSTANDARD = LVCMOS25;
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NET "RXI_LCLK_P" LOC = "F16";
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NET "RXI_LCLK_N" LOC = "F17";
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NET "RXI_DATA_P[0]" LOC = "B19";
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NET "RXI_DATA_N[0]" LOC = "A20";
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NET "RXI_DATA_P[1]" LOC = "C20";
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NET "RXI_DATA_N[1]" LOC = "B20";
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NET "RXI_DATA_P[2]" LOC = "D19";
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NET "RXI_DATA_N[2]" LOC = "D20";
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NET "RXI_DATA_P[3]" LOC = "E18";
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NET "RXI_DATA_N[3]" LOC = "E19";
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NET "RXI_DATA_P[4]" LOC = "E17";
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NET "RXI_DATA_N[4]" LOC = "D18";
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NET "RXI_DATA_P[5]" LOC = "F19";
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NET "RXI_DATA_N[5]" LOC = "F20";
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NET "RXI_DATA_P[6]" LOC = "G17";
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NET "RXI_DATA_N[6]" LOC = "G18";
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NET "RXI_DATA_P[7]" LOC = "G19";
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NET "RXI_DATA_N[7]" LOC = "G20";
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NET "RXI_FRAME_P" LOC = "H15";
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NET "RXI_FRAME_N" LOC = "G15";
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NET "RXO_RD_WAIT" LOC = "J15" | IOSTANDARD = LVCMOS25;
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#NET "RXO_RD_WAIT_N" LOC = "H17";
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NET "RXO_WR_WAIT_P" LOC = "J18";
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NET "RXO_WR_WAIT_N" LOC = "H18";
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NET "TXO_LCLK_P" LOC = "K17";
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NET "TXO_LCLK_N" LOC = "K18";
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NET "TXO_DATA_P[0]" LOC = "K19";
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NET "TXO_DATA_N[0]" LOC = "J19";
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NET "TXO_DATA_P[1]" LOC = "L14";
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NET "TXO_DATA_N[1]" LOC = "L15";
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NET "TXO_DATA_P[2]" LOC = "L16";
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NET "TXO_DATA_N[2]" LOC = "L17";
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NET "TXO_DATA_P[3]" LOC = "M14";
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NET "TXO_DATA_N[3]" LOC = "M15";
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NET "TXO_DATA_P[4]" LOC = "L19";
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NET "TXO_DATA_N[4]" LOC = "L20";
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NET "TXO_DATA_P[5]" LOC = "M19";
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NET "TXO_DATA_N[5]" LOC = "M20";
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NET "TXO_DATA_P[6]" LOC = "M17";
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NET "TXO_DATA_N[6]" LOC = "M18";
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NET "TXO_DATA_P[7]" LOC = "N15";
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NET "TXO_DATA_N[7]" LOC = "N16";
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NET "TXO_FRAME_P" LOC = "J20";
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NET "TXO_FRAME_N" LOC = "H20";
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NET "TXI_RD_WAIT_P" LOC = "K14";
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NET "TXI_RD_WAIT_N" LOC = "J14";
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NET "TXI_WR_WAIT_P" LOC = "K16";
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NET "TXI_WR_WAIT_N" LOC = "J16";
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#######################
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# GPIO
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# First 12 pairs are present on all parts, next 12 on 7020 only
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#######################
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NET "GPIO_P[0]" LOC = "T16";
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NET "GPIO_N[0]" LOC = "U17";
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NET "GPIO_P[1]" LOC = "V16";
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NET "GPIO_N[1]" LOC = "W16";
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NET "GPIO_P[2]" LOC = "P15";
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NET "GPIO_N[2]" LOC = "P16";
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NET "GPIO_P[3]" LOC = "U18";
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NET "GPIO_N[3]" LOC = "U19";
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NET "GPIO_P[4]" LOC = "P14";
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NET "GPIO_N[4]" LOC = "R14";
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NET "GPIO_P[5]" LOC = "T14";
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NET "GPIO_N[5]" LOC = "T15";
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NET "GPIO_P[6]" LOC = "U14";
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NET "GPIO_N[6]" LOC = "U15";
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NET "GPIO_P[7]" LOC = "W14";
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NET "GPIO_N[7]" LOC = "Y14";
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NET "GPIO_P[8]" LOC = "U13";
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NET "GPIO_N[8]" LOC = "V13";
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NET "GPIO_P[9]" LOC = "V12";
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NET "GPIO_N[9]" LOC = "W13";
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NET "GPIO_P[10]" LOC = "T12";
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NET "GPIO_N[10]" LOC = "U12";
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NET "GPIO_P[11]" LOC = "T11";
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NET "GPIO_N[11]" LOC = "T10";
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