mirror of
https://github.com/parallella/parallella-hw.git
synced 2024-11-21 19:08:55 +00:00
257 lines
5.5 KiB
Plaintext
257 lines
5.5 KiB
Plaintext
EESchema Schematic File Version 2
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LIBS:adapteva_kicad
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LIBS:power
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LIBS:device
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LIBS:transistors
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LIBS:conn
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LIBS:linear
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LIBS:regul
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LIBS:74xx
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LIBS:cmos4000
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LIBS:adc-dac
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LIBS:memory
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LIBS:xilinx
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LIBS:special
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LIBS:microcontrollers
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LIBS:dsp
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LIBS:microchip
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LIBS:analog_switches
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LIBS:motorola
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LIBS:texas
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LIBS:intel
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LIBS:audio
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LIBS:interface
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LIBS:digital-audio
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LIBS:philips
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LIBS:display
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LIBS:cypress
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LIBS:siliconi
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LIBS:opto
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LIBS:atmel
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LIBS:contrib
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LIBS:valves
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LIBS:porcupine-cache
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EELAYER 25 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 11 11
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Title "Parallella Breakout Daughtercard, Ver. 2"
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Date "17 feb 2015"
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Rev "A"
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Comp "Adapteva, Inc., 1666 Massachusetts Ave., Lexington, MA, 02420"
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Comment1 "Porcupine Top Level"
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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Text HLabel 4600 4700 0 80 Input ~ 0
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V3P3
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Text HLabel 5100 2300 0 80 Input ~ 0
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VGPIO
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Text HLabel 4600 3100 0 80 BiDi ~ 0
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GPIO_N[0..23]
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Text HLabel 4600 3300 0 80 BiDi ~ 0
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GPIO_P[0..23]
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$Comp
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L GND #PWR031
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U 1 1 54E37D82
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P 6500 5600
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F 0 "#PWR031" H 6500 5600 30 0001 C CNN
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F 1 "GND" H 6500 5530 30 0001 C CNN
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F 2 "" H 6500 5600 60 0000 C CNN
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F 3 "" H 6500 5600 60 0000 C CNN
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1 6500 5600
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1 0 0 -1
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$EndComp
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$Comp
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L CONN\FLEX\1MM\15 J12
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U 1 1 54E37D91
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P 7000 4000
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F 0 "J12" H 7000 4950 60 0000 C CNN
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F 1 "CONN\\FLEX\\1MM\\15" H 7050 5150 60 0001 C CNN
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F 2 "CONN_FLEX_1MM_15" V 7150 4050 60 0000 C CNN
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F 3 "" H 7050 4900 60 0001 C CNN
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F 4 "SLW15S-1C7LF" H 7200 4850 50 0000 C CNN "MFRPN"
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F 5 "FCI" H 7050 5050 50 0001 C CNN "Manufacturer"
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1 7000 4000
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1 0 0 -1
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$EndComp
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Wire Wire Line
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6750 3300 6500 3300
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Wire Wire Line
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6500 2900 6500 5600
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Wire Wire Line
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6750 3600 6500 3600
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Connection ~ 6500 3600
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Wire Wire Line
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6750 3900 6500 3900
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Connection ~ 6500 3900
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Wire Wire Line
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6750 4200 6500 4200
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Connection ~ 6500 4200
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$Comp
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L R\SMD0805\1PCT\10K0 R9
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U 1 1 54E31110
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P 5350 2800
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F 0 "R9" V 5270 2960 40 0000 C CNN
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F 1 "R\\SMD0805\\1PCT\\10K0" V 5357 2801 40 0001 C CNN
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F 2 "R_0805_HS" V 5280 2800 30 0000 C CNN
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F 3 "~" V 5430 2800 30 0000 C CNN
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F 4 "RC0805FR-0710KL" V 5440 2820 60 0000 C CNN "MFRPN"
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F 5 "Yageo" V 5550 2800 60 0001 C CNN "Manufacturer"
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1 5350 2800
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1 0 0 -1
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$EndComp
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$Comp
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L R\SMD0805\1PCT\10K0 R10
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U 1 1 54E3112B
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P 5650 2800
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F 0 "R10" V 5570 2960 40 0000 C CNN
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F 1 "R\\SMD0805\\1PCT\\10K0" V 5657 2801 40 0001 C CNN
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F 2 "R_0805_HS" V 5580 2800 30 0000 C CNN
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F 3 "~" V 5730 2800 30 0000 C CNN
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F 4 "RC0805FR-0710KL" V 5740 2820 60 0000 C CNN "MFRPN"
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F 5 "Yageo" V 5850 2800 60 0001 C CNN "Manufacturer"
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1 5650 2800
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1 0 0 -1
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$EndComp
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Wire Wire Line
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5800 5350 5800 5450
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Wire Wire Line
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5800 5450 6500 5450
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Connection ~ 6500 5450
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Wire Wire Line
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5800 4950 5800 4700
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Wire Wire Line
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4600 4700 6750 4700
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Connection ~ 5800 4700
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Wire Wire Line
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5650 3050 5650 4500
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Wire Wire Line
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5350 3050 5350 4600
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Wire Wire Line
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5650 2300 5650 2550
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Wire Wire Line
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5350 2300 5350 2550
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Connection ~ 5350 2300
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Connection ~ 5650 2300
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Connection ~ 6500 3300
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Wire Bus Line
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4600 3300 4850 3300
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Wire Bus Line
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4850 3300 4850 4600
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Wire Bus Line
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4600 3100 5050 3100
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Wire Bus Line
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5050 3100 5050 4500
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$Comp
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L C\SMD0805\50V\104 C1
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U 1 1 54E315A2
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P 5800 5150
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F 0 "C1" V 5850 5250 40 0000 L CNN
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F 1 "C\\SMD0805\\50V\\104" H 5806 5065 40 0001 L CNN
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F 2 "C_0805_HS" V 5850 4900 30 0000 L TNN
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F 3 "~" H 5800 5250 60 0000 C CNN
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F 4 "C0805C104K5RACTU" V 5950 4650 60 0000 L TNN "MFRPN"
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F 5 "Kemet" H 6050 5150 60 0001 C CNN "Manufacturer"
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1 5800 5150
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1 0 0 -1
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$EndComp
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$Comp
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L C\SMD0805\50V\104 C2
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U 1 1 54E315BD
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P 6500 2700
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F 0 "C2" V 6550 2800 40 0000 L CNN
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F 1 "C\\SMD0805\\50V\\104" H 6506 2615 40 0001 L CNN
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F 2 "C_0805_HS" V 6550 2450 30 0000 L TNN
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F 3 "~" H 6500 2800 60 0000 C CNN
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F 4 "C0805C104K5RACTU" V 6650 2200 60 0000 L TNN "MFRPN"
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F 5 "Kemet" H 6750 2700 60 0001 C CNN "Manufacturer"
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1 6500 2700
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1 0 0 -1
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$EndComp
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Entry Wire Line
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5050 3300 5150 3400
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Entry Wire Line
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4850 3400 4950 3500
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Entry Wire Line
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5050 3600 5150 3700
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Entry Wire Line
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4850 3700 4950 3800
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Entry Wire Line
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5050 3900 5150 4000
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Entry Wire Line
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4850 4000 4950 4100
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Entry Wire Line
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5050 4200 5150 4300
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Entry Wire Line
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4850 4300 4950 4400
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Wire Wire Line
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5150 3400 6750 3400
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Wire Wire Line
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6750 3500 4950 3500
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Wire Wire Line
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5150 3700 6750 3700
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Wire Wire Line
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6750 3800 4950 3800
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Wire Wire Line
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5150 4000 6750 4000
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Wire Wire Line
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6750 4100 4950 4100
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Wire Wire Line
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5150 4300 6750 4300
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Wire Wire Line
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4950 4400 6750 4400
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Entry Wire Line
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5050 4400 5150 4500
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Entry Wire Line
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4850 4500 4950 4600
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Text Label 5850 3400 0 80 ~ 0
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GPIO_N8
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Text Label 5850 3500 0 80 ~ 0
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GPIO_P8
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Text Label 5850 3700 0 80 ~ 0
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GPIO_N9
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Text Label 5850 3800 0 80 ~ 0
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GPIO_P9
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Wire Wire Line
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5100 2300 6500 2300
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Wire Wire Line
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6500 2300 6500 2500
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Wire Wire Line
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4950 4600 6750 4600
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Connection ~ 5350 4600
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Wire Wire Line
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5150 4500 6750 4500
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Connection ~ 5650 4500
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Text Label 5850 4000 0 80 ~ 0
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GPIO_N6
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Text Label 5850 4100 0 80 ~ 0
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GPIO_P6
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Text Label 5800 4300 0 80 ~ 0
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GPIO_N10
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Text Label 5800 4400 0 80 ~ 0
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GPIO_P10
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Text Label 5800 4500 0 80 ~ 0
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GPIO_N11
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Text Label 5800 4600 0 80 ~ 0
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GPIO_P11
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Text Notes 7400 3500 0 80 ~ 0
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DATA 0
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Text Notes 7400 3800 0 80 ~ 0
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DATA1
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Text Notes 7400 4100 0 80 ~ 0
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CLOCK (FPGA LANE 6 IS CLOCK INPUT)
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Text Notes 7400 4350 0 80 ~ 0
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GPIO: ENABLE
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Text Notes 7400 4450 0 80 ~ 0
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LED
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Text Notes 7400 4550 0 80 ~ 0
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SCLK
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Text Notes 7400 4650 0 80 ~ 0
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SDA
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Text Notes 5250 1850 0 80 ~ 0
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NOTE: GPIO SIGNALS 11 ARE PULLED\nUP TO VGPIO BY THESE R'S FOR USE\nAS I2C.
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$EndSCHEMATC
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