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https://github.com/system76/thelio-io-hardware.git
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133 lines
4.0 KiB
Python
Executable File
133 lines
4.0 KiB
Python
Executable File
#!/usr/bin/env python2
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'''
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A python script example to create plot files to build a board:
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Gerber files
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Drill files
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Map dril files
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Important note:
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this python script does not plot frame references (page layout).
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the reason is it is not yet possible from a python script because plotting
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plot frame references needs loading the corresponding page layout file
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(.wks file) or the default template.
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This info (the page layout template) is not stored in the board, and therefore
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not available.
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Do not try to change SetPlotFrameRef(False) to SetPlotFrameRef(true)
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the result is the pcbnew lib will crash if you try to plot
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the unknown frame references template.
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Anyway, in gerber and drill files the page layout is not plot
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'''
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import sys
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from pcbnew import *
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if len(sys.argv) < 2:
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print("plot.py [KiCad PCB] [Output Directory]")
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exit(1)
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filename = sys.argv[1]
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plotDir = sys.argv[2]
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board = LoadBoard(filename)
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pctl = PLOT_CONTROLLER(board)
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popt = pctl.GetPlotOptions()
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popt.SetOutputDirectory(plotDir)
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# Set some important plot options (see pcb_plot_params.h):
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popt.SetPlotFrameRef(False) #do not change it
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popt.SetLineWidth(FromMM(0.35))
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popt.SetAutoScale(False) #do not change it
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popt.SetScale(1) #do not change it
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popt.SetMirror(False)
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popt.SetUseGerberAttributes(True)
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popt.SetIncludeGerberNetlistInfo(True)
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popt.SetUseGerberProtelExtensions(False)
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popt.SetExcludeEdgeLayer(False)
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popt.SetScale(1)
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popt.SetUseAuxOrigin(True)
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# This by gerbers only
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popt.SetSubtractMaskFromSilk(False)
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# Disable plot pad holes
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popt.SetDrillMarksType( PCB_PLOT_PARAMS.NO_DRILL_SHAPE )
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# Skip plot pad NPTH when possible: when drill size and shape == pad size and shape
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# usually sel to True for copper layers
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popt.SetSkipPlotNPTH_Pads( False )
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# Once the defaults are set it become pretty easy...
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# I have a Turing-complete programming language here: I'll use it...
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# param 0 is a string added to the file base name to identify the drawing
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# param 1 is the layer ID
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# param 2 is a comment
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plot_plan = [
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( "CuTop", F_Cu, "Top layer" ),
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( "CuBottom", B_Cu, "Bottom layer" ),
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( "PasteBottom", B_Paste, "Paste Bottom" ),
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( "PasteTop", F_Paste, "Paste top" ),
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( "SilkTop", F_SilkS, "Silk top" ),
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( "SilkBottom", B_SilkS, "Silk top" ),
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( "MaskBottom", B_Mask, "Mask bottom" ),
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( "MaskTop", F_Mask, "Mask top" ),
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( "EdgeCuts", Edge_Cuts, "Edges" ),
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]
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for layer_info in plot_plan:
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if layer_info[1] <= B_Cu:
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popt.SetSkipPlotNPTH_Pads( True )
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else:
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popt.SetSkipPlotNPTH_Pads( False )
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pctl.SetLayer(layer_info[1])
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pctl.OpenPlotfile(layer_info[0], PLOT_FORMAT_GERBER, layer_info[2])
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print 'plot %s' % pctl.GetPlotFileName()
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if pctl.PlotLayer() == False:
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print "plot error"
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#generate internal copper layers, if any
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lyrcnt = board.GetCopperLayerCount()
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for innerlyr in range ( 1, lyrcnt-1 ):
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popt.SetSkipPlotNPTH_Pads( True )
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pctl.SetLayer(innerlyr)
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lyrname = board.GetLayerName(innerlyr)
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pctl.OpenPlotfile(lyrname, PLOT_FORMAT_GERBER, "inner")
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print 'plot %s' % pctl.GetPlotFileName()
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if pctl.PlotLayer() == False:
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print "plot error"
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# At the end you have to close the last plot, otherwise you don't know when
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# the object will be recycled!
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pctl.ClosePlot()
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# Fabricators need drill files.
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# sometimes a drill map file is asked (for verification purpose)
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drlwriter = EXCELLON_WRITER( board )
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drlwriter.SetMapFileFormat( PLOT_FORMAT_PDF )
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mirror = False
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minimalHeader = False
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offset = wxPoint(0,0)
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# False to generate 2 separate drill files (one for plated holes, one for non plated holes)
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# True to generate only one drill file
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mergeNPTH = False
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drlwriter.SetOptions( mirror, minimalHeader, offset, mergeNPTH )
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metricFmt = True
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drlwriter.SetFormat( metricFmt )
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genDrl = True
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genMap = False
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print 'create drill and map files in %s' % pctl.GetPlotDirName()
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drlwriter.CreateDrillandMapFilesSet( pctl.GetPlotDirName(), genDrl, genMap )
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