2025-08-26 15:57:08 +00:00
2025-03-13 16:54:52 -07:00
2025-03-13 16:54:52 -07:00
2025-08-26 15:57:08 +00:00
2025-03-13 23:52:21 +00:00
CycloneV_RunBMC_Quick_Start_Guide.pdf
2025-03-13 23:52:21 +00:00
2025-03-13 23:52:21 +00:00
2025-03-13 16:54:52 -07:00
CycloneV_RunBMC.pdf
2025-03-13 23:52:21 +00:00
2025-03-14 04:12:33 +00:00

Intel® Cyclone® V RunBMC Card

Overview

Disclaimer: The Intel® Cyclone® V RunBMC Card has been designed and enabled by Intel as a proof of concept (PoC) solution and technology enabling. For further details on Cyclone V SoC FPGAs and the next-generation SoC FPGAs from Intel that can run the OpenBMC firmware, please use the contact information provided on this web page.

This module is compliant with the OCP RunBMC v1.4.1 specification. It enables the use of Intels Cyclone V SoC FPGAs as a baseboard management controller (BMC) solution. Intels Cyclone V SoC FPGAs embed a hardened dual-core Arm Cortex-A9 subsystem closely coupled with the FPGA fabric.

Such a combination provides an easy way of enabling the OpenBMC firmware with great flexibility in adjusting the BMC hardware with a mix of hard intellectual property (IP) cores from the Arm subsystem and soft IP cores running on the FPGA fabric.

Technical specifications

  • Intel Cyclone V SX SoC FPGA
    • Arm Cortex-A9 processor @ 925 MHz
    • 1 GB DDR3 with ECC @ 400 MHz
    • 1 x PCIe hard IP
    • 40k adaptive logic modules (ALMs), or 110k logic elements (LEs)
    • Digital signal processing (DSP) blocks
  • Intel MAX® 10 FPGA
    • 50K LEs
    • 18 x 12-bit analog-to-digital converter (ADC)
    • 736 KB user flash memory (UFM)
  • Other on-board components
    • 16 GB eMMC memory
    • 64 MB QSPI flash memory
    • Fan-speed controller MAX314790

Resources

Description
No description provided
Readme 17 MiB