peterj.nikhef.nl 5619bfd538 IPMUX TX input fifos are now split into a data fifo and an End Of Data fifo. The latter shows the availability of a complete packet in the data fifo. w This solves blocking of other input streams (due to a connect to a stream for which the header is initiated but the tail is kept until the next time slice). Added some extra bits "packet available" in the Tx Stream Select register and added CPU_Req and CPU_Gnt pins on the FMC Test Connector.

2014-09-17 13:44:36 +00:00

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IPMUX TX input fifos are now split into a data fifo and an End Of Data fifo. The latter shows the availability of a complete packet in the data fifo. w This solves blocking of other input streams (due to a connect to a stream for which the header is initiated but the tail is kept until the next time slice). Added some extra bits "packet available" in the Tx Stream Select register and added CPU_Req and CPU_Gnt pins on the FMC Test Connector.

2014-09-17 13:44:36 +00:00