dacaldia ab4a9ac17f Watchdog implementation: ...

Register documentation and Watchdog wb slave
fpga.vhd, lm32_2nd.vhd, lm32_2nd_pkg.vhd and do_input_file_list also updated

2016-08-11 07:57:41 +00:00

..

dummys

Added State Machine IO to lm32_2nd.ews.zip

2013-11-19 16:00:07 +00:00

wishbone

added flush and enable to aes module

2014-08-29 09:14:30 +00:00

aes_pkg.vhd

This is a first shot lm32_2nd system that simulates fine, with precision synthesis and place&route also creates a working design on KC705.

2013-07-01 15:23:43 +00:00

lm32_2nd_pkg.vhd

Watchdog implementation:

2016-08-11 07:57:41 +00:00

metastabilizer.vhd

Removed use of std_logic_arith and cleaned up the design. Design now works using either XST or Precision Synthesis.

2014-08-11 18:42:32 +00:00

stmach_pkg.vhd

Added State Machine IO to lm32_2nd.ews.zip

2013-11-19 16:00:07 +00:00

tdc_pkg.vhd

Reverted back to revision 306 (from 335 which was edited for adding the TDC)

2013-07-26 09:34:14 +00:00

xwb_aes_empty.vhd

This is a first shot lm32_2nd system that simulates fine, with precision synthesis and place&route also creates a working design on KC705.

2013-07-01 15:23:43 +00:00

xwb_stmach_empty.vhd

Added State Machine IO to lm32_2nd.ews.zip

2013-11-19 16:00:07 +00:00

xwb_tdc_empty.vhd

This is a first shot lm32_2nd system that simulates fine, with precision synthesis and place&route also creates a working design on KC705.

2013-07-01 15:23:43 +00:00