peterj.nikhef.nl 4df3c9bd57 Timing violation on RST of TDC frontend fifo's. Removed combinatorial OR. Ran do_xilinx.cmd => new bitfile

2018-10-19 13:12:10 +00:00

..

syn_lm32

sub-design lm32_2nd added USB-Fanout to accommodate USB via G-Board. Added vivado_via_edf, a first attempt to implement the lm32_2nd with Vivado.

2015-04-08 11:21:35 +00:00

syn_top

Added IRQ(8) that is asserted once per second (non synchronous to anything, just a divide on the system clock)

2016-06-01 11:19:30 +00:00

vivado_via_edf

Timing violation on RST of TDC frontend fifo's. Removed combinatorial OR. Ran do_xilinx.cmd => new bitfile

2018-10-19 13:12:10 +00:00