gitified_old_clb_svn/fw/TestDesigns/UART_Ethernet_DataOut/top

File description:

lm32_2nd.vhd 	the top level of the second lm32 system
fpga.vhd		the description of a small design to test the lm32_2nd on the KC705
system.vhd		top level (acts as test bench for fpga.vhd) handy for simulation

Note that these files were generated by EASE. You could modify them but it is better to
update the graphical EASE design and generate new onces such that he graphical design is kept synchronized.