.allspice/.gitignore/.gitignore.altium

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+# ---> AltiumDesigner
+# For PCBs designed using Altium Designer
+# Website: https://www.altium.com/altium-designer/
+
+# Directories containing cache data
+History
+__Previews
+
+# Directories containing logs and generated outputs
+Project\ Logs*
+Project\ Outputs*
+
+# Misc files generated by altium
+debug.log
+Status\ Report.txt
+*.PcbDoc.htm
+*.SchDocPreview
+*.PcbDocPreview
+
+# Lock files sometimes left behind
+.~lock.*
+

.allspice/.gitignore/.gitignore.eagle

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+# ---> Eagle
+# Ignore list for Eagle, a PCB layout tool
+
+# Backup files
+*.s#?
+*.b#?
+*.l#?
+*.b$?
+*.s$?
+*.l$?
+
+# Eagle project file
+# It contains a serial number and references to the file structure
+# on your computer.
+# comment the following line if you want to have your project file included.
+eagle.epf
+
+# Autorouter files
+*.pro
+*.job
+
+# CAM files
+*.$$$
+*.cmp
+*.ly2
+*.l15
+*.sol
+*.plc
+*.stc
+*.sts
+*.crc
+*.crs
+
+*.dri
+*.drl
+*.gpi
+*.pls
+*.ger
+*.xln
+
+*.drd
+*.drd.*
+
+*.s#*
+*.b#*
+
+*.info
+
+*.eps
+
+# file locks introduced since 7.x
+*.lck
+

.allspice/.gitignore/.gitignore.kicad

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+# ---> KiCad
+# For PCBs designed using KiCad: https://www.kicad.org/
+# Format documentation: https://kicad.org/help/file-formats/
+
+# Temporary files
+*.000
+*.bak
+*.bck
+*.kicad_pcb-bak
+*.kicad_sch-bak
+*-backups
+*.kicad_prl
+*.sch-bak
+*~
+_autosave-*
+*.tmp
+*-save.pro
+*-save.kicad_pcb
+fp-info-cache
+
+# Netlist files (exported from Eeschema)
+*.net
+
+# Autorouter files (exported from Pcbnew)
+*.dsn
+*.ses
+
+# Exported BOM files
+*.xml
+*.csv
+

.allspice/.gitignore/.gitignore.orcad

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+# ---> OrCAD
+# .gitignore for Cadence OrCAD projects
+# Website: https://www.orcad.com/
+
+### OrCAD ###
+## Schematic
+# schematic design lock file
+*.DSNlck
+# design backup archive
+*.DBK
+
+## PCB
+# pcb design lock file
+*.brd.lck
+# generated autorouter metadata
+*.did
+# local backup file
+AUTOSAVE.brd
+*.SAV
+last_import_time.txt
+# generated journal files
+*.jrl
+# generated error log file
+*.dmp
+
+## General
+*.log
+# generated metadata file
+*_convert.txt
+# project lock file
+*.OLBlck
+# ultralibrarian generated documentation
+ImportGuide.html
+# generated orcad file, including which file was last opened
+master.tag
+

.gitattributes

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+*.[oO][uU][tT][jJ][oO][bB] binary linguist-detectable
+*.[pP][cC][bB][dD][oO][cC] diff=allspice linguist-detectable
+*.[pP][rR][jJ][pP][cC][bB] binary linguist-generated
+*.[sS][cC][hH][dD][oO][cC] diff=allspice linguist-detectable
+*.cmp diff=allspice linguist-detectable

.gitignore

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+# ---> AltiumDesigner
+# For PCBs designed using Altium Designer
+# Website: https://www.altium.com/altium-designer/
+
+# Directories containing cache data
+History
+__Previews
+
+# Directories containing logs and generated outputs
+Project\ Logs*
+Project\ Outputs*
+
+# Misc files generated by altium
+debug.log
+Status\ Report.txt
+*.PcbDoc.htm
+*.SchDocPreview
+*.PcbDocPreview
+
+# Lock files sometimes left behind
+.~lock.*
+

readme.md

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+![new repo](./images/new_repo.png)
+
+# Welcome
+
+Welcome to your new repo. This is your readme.md file.
+
+
+## You can edit this file and add information and specifications about your project
+
+ - [ ]  1 pA accuracy
+ - [ ]  weight < 2.5 kg