13 lines
484 B
Markdown
13 lines
484 B
Markdown
# uob-hep-pc072
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DUNE Timing System MicroTCA Interface Board(MIB).
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Bug-fixed version of board with schematic capture done at University of Pensylvania by Godwin Meyers in Cadence Orcad
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Translated to Cadence Allegro Design Entry HDL by Elgris Technologies
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Changes to original design done by Magnus Loutit and David Cussans
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This design has no ADN2814 CDR - recovery of clock done directly by Si5395 PLL
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List of changes w.r.t. v0.1 MIB at https://webapps-pp.bris.ac.uk/elog/DUNE/34
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