Add TI CC1200 and CC1201 #78

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multiplemonomials wants to merge 1 commits from add-cc1201 into master
multiplemonomials commented 2020-10-15 20:54:48 +00:00 (Migrated from github.com)

This PR adds schematic symbols for TI's CC1200 and CC1201 RF transceiver ICs. The CC1201 is nearly identical to the CC1200, it's just cheaper with limited selectable bandwidth. These are both pin-compatible to the CC1120, and they use the same footprint as it (TI PVQFN-32 5X5MM RHB) though I'm not sure how to associate the symbols with the footprint.

I've used this symbol successfully on a test board this year.

This PR adds schematic symbols for TI's CC1200 and CC1201 RF transceiver ICs. The CC1201 is nearly identical to the CC1200, it's just cheaper with limited selectable bandwidth. These are both pin-compatible to the CC1120, and they use the same footprint as it (TI PVQFN-32 5X5MM RHB) though I'm not sure how to associate the symbols with the footprint. I've used this symbol successfully on a test board this year.
msamy0 commented 2020-11-03 15:47:19 +00:00 (Migrated from github.com)

SCH - RF - IC - TI CC1200.SchLib
SCH - RF - IC - TI CC1201.SchLib

  • kindly represent every single pin separately, don't merger all VDD pins in one pin and hide the pin numbers like what you do.
  • name the pins exactly as they are in the pin configuration table here in page 6, so Pin 2 ~RST should be RESET_N.
  • Ground pad is must have a pin number even if it is marked as (-) in the pin configuration table, so it is (Pin 33) not (Pin PAD). this ease the process of linking SCHLib later to a PCBLib in the database.
  • I would recommend arranging the pins this way like TI CC1120
    image
  • initially rename all the pins as the pin configuration table in the datasheet
  • separate RBIAS pin from DCPL pins by at least 1 square
  • move PA and TRX to the bottom right corner
  • move CS, SCLK, MOIS and MOIS/GPIO to the top right corner
  • combine all XOSC and move them to the right
**SCH - RF - IC - TI CC1200.SchLib** **SCH - RF - IC - TI CC1201.SchLib** - kindly represent every single pin separately, don't merger all VDD pins in one pin and hide the pin numbers like what you do. - name the pins exactly as they are in the pin configuration table [here](https://www.ti.com/lit/ds/symlink/cc1200.pdf?HQS=TI-null-null-digikeymode-df-pf-null-wwe&ts=1604410995713) in page 6, so Pin 2 **~RST** should be **RESET_N**. - Ground pad is must have a pin number even if it is marked as (-) in the pin configuration table, so it is (Pin 33) not (Pin PAD). this ease the process of linking SCHLib later to a PCBLib in the database. - I would recommend arranging the pins this way like **TI CC1120** ![image](https://user-images.githubusercontent.com/64434690/98007833-84afa600-1dfc-11eb-8d9d-3eee19492a8d.png) - initially rename all the pins as the pin configuration table in the [datasheet](https://www.ti.com/lit/ds/symlink/cc1200.pdf?HQS=TI-null-null-digikeymode-df-pf-null-wwe&ts=1604410995713) - separate **RBIAS** pin from **DCPL** pins by at least 1 square - move **PA** and **TRX** to the bottom right corner - move **CS, SCLK, MOIS** and **MOIS/GPIO** to the top right corner - combine all **XOSC** and move them to the right
multiplemonomials commented 2021-03-26 06:00:09 +00:00 (Migrated from github.com)

Honestly, I don't think I'm going to have time to apply these changes anytime soon. I do love the library though!

Honestly, I don't think I'm going to have time to apply these changes anytime soon. I do love the library though!

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Reference: AllSpice-Resources/Altium-Celestial-library#78
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