Started diff pair routing

I miss Altium :(
2025-04-22 17:43:44 +00:00 · 2025-03-25 18:19:22 -04:00 · 2025-03-25 18:19:22 -04:00 · 99b85d1774
commit 99b85d1774
parent 4e97e82a2f
7 changed files with 11951 additions and 7896 deletions
--- a/Hardware/KiCad/Thunderscope_Rev5/FPGA_Bank_IO.kicad_sch
+++ b/Hardware/KiCad/Thunderscope_Rev5/FPGA_Bank_IO.kicad_sch
--- a/Hardware/KiCad/Thunderscope_Rev5/FPGA_CFG_MGT.kicad_sch
+++ b/Hardware/KiCad/Thunderscope_Rev5/FPGA_CFG_MGT.kicad_sch
--- a/Hardware/KiCad/Thunderscope_Rev5/FPGA_PWR.kicad_sch
+++ b/Hardware/KiCad/Thunderscope_Rev5/FPGA_PWR.kicad_sch
--- a/Hardware/KiCad/Thunderscope_Rev5/FPGA_VREG.kicad_sch
+++ b/Hardware/KiCad/Thunderscope_Rev5/FPGA_VREG.kicad_sch
--- a/Hardware/KiCad/Thunderscope_Rev5/PLL.kicad_sch
+++ b/Hardware/KiCad/Thunderscope_Rev5/PLL.kicad_sch
--- a/Hardware/KiCad/Thunderscope_Rev5/Thunderscope_Rev5.kicad_pcb
+++ b/Hardware/KiCad/Thunderscope_Rev5/Thunderscope_Rev5.kicad_pcb
--- a/Hardware/KiCad/Thunderscope_Rev5/Thunderscope_Rev5.kicad_prl
+++ b/Hardware/KiCad/Thunderscope_Rev5/Thunderscope_Rev5.kicad_prl
@ -242,7 +242,7 @@
      "lockedItems": false,
      "otherItems": true,
      "pads": true,
-      "text": false,
+      "text": true,
      "tracks": true,
      "vias": true,
      "zones": true
@ -267,7 +267,7 @@
      "conflict_shadows",
      "shapes"
    ],
-    "visible_layers": "00000000_00000000_00000008_82002227",
+    "visible_layers": "00000000_00000000_00000008_82002267",
    "zone_display_mode": 0
  },
  "git": {