19 lines
531 B
VHDL
19 lines
531 B
VHDL
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-- generated by newgenasym Mon Sep 08 15:36:29 2014
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity \10e131\ is
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generic (
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size:positive:= 1
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);
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port (
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CLK: IN STD_LOGIC;
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D: IN STD_LOGIC_VECTOR (size-1 DOWNTO 0);
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EN: IN STD_LOGIC;
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Q: OUT STD_LOGIC_VECTOR (size-1 DOWNTO 0);
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\q*\: OUT STD_LOGIC_VECTOR (size-1 DOWNTO 0);
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R: IN STD_LOGIC;
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S: IN STD_LOGIC);
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end \10e131\;
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