Worked on translation schems and...
Something is wrong with the translation block symbol. I'm gonna try and fix it without deleting everything but this commit is just in case i fuck that up
This commit is contained in:
Eric Marzec
parent
d6158cd120
commit
ac5895baa3
Parts/parts
adw
temp
tubii_tk2.cpmworklib
general_utilities/sch_1
general_utilities.congeneral_utilities.dcf,1general_utilities.dcf,2general_utilities.dcf,3general_utilities.xcon,1general_utilities.xcon,2general_utilities.xcon,3page1_csb.lck
lvds_ecl/sch_1
translation
entity
sch_1
translation.contranslation.dcf,1translation.dcf,2translation.dcf,3translation.xcon,1translation.xcon,2translation.xcon,3
sym_1
ttl_ecl/sch_1
@ -1,15 +1,17 @@
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// generated by newgenasym Tue Jan 27 19:16:21 2015
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// generated by newgenasym Wed Mar 04 12:20:04 2015
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module ds90lv019 (de, din, dout, \dout* , re, ri, \ri* , rout);
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module ds90lv019 (de, din, dout, \dout* , gnd, re, ri, \ri* , rout, vcc);
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input de;
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input din;
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output dout;
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output \dout* ;
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input gnd;
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input re;
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input ri;
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input \ri* ;
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output rout;
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input vcc;
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initial
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@ -1,4 +1,4 @@
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-- generated by newgenasym Tue Jan 27 19:16:21 2015
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-- generated by newgenasym Wed Mar 04 12:20:04 2015
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library ieee;
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use ieee.std_logic_1164.all;
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@ -9,8 +9,10 @@ entity ds90lv019 is
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DIN: IN STD_LOGIC;
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DOUT: OUT STD_LOGIC;
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\dout*\: OUT STD_LOGIC;
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GND: IN STD_LOGIC;
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RE: IN STD_LOGIC;
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RI: IN STD_LOGIC;
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\ri*\: IN STD_LOGIC;
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ROUT: OUT STD_LOGIC);
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ROUT: OUT STD_LOGIC;
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VCC: IN STD_LOGIC);
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end ds90lv019;
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@ -1,4 +1,4 @@
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// generated by newgenasym Tue Jun 21 11:49:44 2011
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// generated by newgenasym Wed Mar 04 17:06:07 2015
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module mpsh81 (b, c, e);
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@ -1,11 +1,11 @@
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-- generated by newgenasym Tue Jun 21 11:49:44 2011
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-- generated by newgenasym Wed Mar 04 17:06:07 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity MPSH81 is
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entity mpsh81 is
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port (
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B: INOUT STD_LOGIC;
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C: INOUT STD_LOGIC;
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E: INOUT STD_LOGIC);
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end MPSH81;
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end mpsh81;
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@ -211,4 +211,10 @@
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<property name="VALUE" value="0.33UF"/>
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<property name="VOLTAGE" value="25V"/>
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</component>
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<component cell="ds90lv019" library="misc" partname="DS90LV019" partno="" quantity="1" >
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</component>
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<component cell="mpsh81" library="transistors" partname="MPSH81" partno="" quantity="1" >
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</component>
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<component cell="mmbth10" library="transistors" partname="MMBTH10" partno="" quantity="1" >
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</component>
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</sc:shoppingCart>
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@ -11,9 +11,9 @@
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(location
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(
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(object_kind "wire")
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(canonical_name "_!drawerror (-2100,4025);")
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(canonical_name "_!drawerror (-1175,3425);")
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(parent_canonical_name "unused")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1")
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)
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)
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)
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@ -27,9 +27,9 @@
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(location
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(
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(object_kind "wire")
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(canonical_name "_!drawerror (-125,3750);")
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(canonical_name "_!drawerror (-25,3425);")
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(parent_canonical_name "unused")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1")
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)
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)
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)
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@ -43,9 +43,9 @@
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(location
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(
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(object_kind "wire")
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(canonical_name "_!drawerror (-125,4050);")
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(canonical_name "_!drawerror (-37,3225);")
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(parent_canonical_name "unused")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1")
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)
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)
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)
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@ -59,9 +59,9 @@
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(location
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(
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(object_kind "wire")
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(canonical_name "_!drawerror (-125,3950);")
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(canonical_name "_!drawerror (-25,3325);")
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(parent_canonical_name "unused")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
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(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1")
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)
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)
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)
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@ -2,3 +2,86 @@
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CSDirect 16.6-p007 (v16-6-112F)
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Netlisting block translation
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Processing page 1
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ERROR(SPCOCD-168): Schematic has port but port
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does not exist in the symbol. Either delete this port from
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the schematic or add this port in the symbol.
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Port name: ecl_to_lvds_in
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
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First object description:
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Object description:
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The entity declaration for translation.
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Entity Port: ecl_to_lvds_in
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Second object description:
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The entity declaration for translation.
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Entity Port: ecl_to_lvds_in
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ERROR(SPCOCD-168): Schematic has port but port
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does not exist in the symbol. Either delete this port from
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the schematic or add this port in the symbol.
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Port name: ecl_to_ttl_in
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
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First object description:
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Object description:
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The entity declaration for translation.
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Entity Port: ecl_to_ttl_in
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Second object description:
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The entity declaration for translation.
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Entity Port: ecl_to_ttl_in
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ERROR(SPCOCD-168): Schematic has port but port
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does not exist in the symbol. Either delete this port from
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the schematic or add this port in the symbol.
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Port name: lvds_to_ecl_in_n
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
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First object description:
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Object description:
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The entity declaration for translation.
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Entity Port: lvds_to_ecl_in_n
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Second object description:
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The entity declaration for translation.
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Entity Port: lvds_to_ecl_in_n
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ERROR(SPCOCD-168): Schematic has port but port
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does not exist in the symbol. Either delete this port from
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the schematic or add this port in the symbol.
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Port name: lvds_to_ecl_in_p
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
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First object description:
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Object description:
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The entity declaration for translation.
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Entity Port: lvds_to_ecl_in_p
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Second object description:
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The entity declaration for translation.
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Entity Port: lvds_to_ecl_in_p
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ERROR(SPCOCD-168): Schematic has port but port
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does not exist in the symbol. Either delete this port from
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the schematic or add this port in the symbol.
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Port name: nim_to_ecl_out
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
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First object description:
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Object description:
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The entity declaration for translation.
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Entity Port: nim_to_ecl_out
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Second object description:
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The entity declaration for translation.
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Entity Port: nim_to_ecl_out
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ERROR(SPCOCD-171): Port exists in symbol but not
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in the schematic. Either delete this port from the symbol or
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add this port in the schematic.
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Port name: lvds_to_ecl_in
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Entity
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file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
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First object description:
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Object description:
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The schematic drawing for translation.
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Second object description:
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The entity declaration for translation.
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Entity Port: lvds_to_ecl_in
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71
temp/lvds_ecl.sch_1.mkr
Normal file
71
temp/lvds_ecl.sch_1.mkr
Normal file
@ -0,0 +1,71 @@
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(marker_file
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(version 1.0)
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(markers
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(
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(tool "Concept")
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(class "SCHEMATIC")
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(severity 40)
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(error_num 1)
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(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
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(long_msg "Severity : Error (Concept)
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Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
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Port name: lvds_in_n
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\entity\verilog.v
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Object dump:
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{
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port name: lvds_in_n
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}
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{
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port name: lvds_in_n
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}
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||||
")
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(location
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(
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(object_kind "ThisEntityPort")
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(canonical_name "_!drawerror signal lvds_in_n;")
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(parent_canonical_name "DRAWERROR NET lvds_in_n")
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||||
(drawing_name "@tubii_tk2_lib.lvds_ecl(sch_1):page1")
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)
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(
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(object_kind "ThisEntityPort")
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(canonical_name "_!drawerror signal lvds_in_n;")
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(parent_canonical_name "DRAWERROR NET lvds_in_n")
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(drawing_name "@tubii_tk2_lib.lvds_ecl(sch_1):page1")
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)
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||||
)
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||||
)
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(
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(tool "Concept")
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(class "SCHEMATIC")
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(severity 40)
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||||
(error_num 2)
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||||
(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
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(long_msg "Severity : Error (Concept)
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Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
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Port name: lvds_in_p
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\entity\verilog.v
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Object dump:
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{
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port name: lvds_in_p
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}
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{
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port name: lvds_in_p
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||||
}
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||||
")
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(location
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||||
(
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||||
(object_kind "ThisEntityPort")
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||||
(canonical_name "_!drawerror signal lvds_in_p;")
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||||
(parent_canonical_name "DRAWERROR NET lvds_in_p")
|
||||
(drawing_name "@tubii_tk2_lib.lvds_ecl(sch_1):page1")
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||||
)
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||||
(
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(object_kind "ThisEntityPort")
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(canonical_name "_!drawerror signal lvds_in_p;")
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(parent_canonical_name "DRAWERROR NET lvds_in_p")
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||||
(drawing_name "@tubii_tk2_lib.lvds_ecl(sch_1):page1")
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)
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||||
)
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)
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)
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)
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@ -1,22 +1,16 @@
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03/02/15 15:42:37 Opening project C:/Users/QGPWindowsVB/Documents/ANUSTART/tubii_tk2.cpm
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03/02/15 15:42:37 cdslib C:/Users/QGPWindowsVB/Documents/ANUSTART/cds.lib opened
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03/02/15 15:42:37 Project C:/Users/QGPWindowsVB/Documents/ANUSTART/tubii_tk2.cpm opened
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03/02/15 15:43:17 Loading cell ds90lv027 from library misc
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03/02/15 15:43:17 Loading view sym_1 of cell ds90lv027
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03/02/15 15:43:17 Loading view chips of cell ds90lv027
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03/02/15 15:43:17 Loading view entity of cell ds90lv027
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03/02/15 15:43:17 Loading cell ds90lv027 from library misc
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03/02/15 15:43:17 Analyzing view relationships of cell ds90lv027 in library misc
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03/02/15 15:43:17 Completed loading cell ds90lv027 from library misc
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03/02/15 15:43:17 Starting validations on cell ds90lv027 of library misc
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03/02/15 15:43:17 Completed validations on cell ds90lv027 of library misc
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03/02/15 15:45:27 Starting validations on cell ds90lv027 of library misc
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03/02/15 15:45:27 Completed validations on cell ds90lv027 of library misc
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03/02/15 15:45:36 Starting validations on cell ds90lv027 of library misc
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03/02/15 15:45:36 Completed validations on cell ds90lv027 of library misc
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03/02/15 15:46:42 Starting validations on cell ds90lv027 of library misc
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03/02/15 15:46:42 Completed validations on cell ds90lv027 of library misc
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03/02/15 15:48:31 Starting validations on cell ds90lv027 of library misc
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03/02/15 15:48:31 Completed validations on cell ds90lv027 of library misc
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03/02/15 15:48:32 Completed saving cell ds90lv027 in library misc
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03/02/15 15:48:34 Project C:/Users/QGPWindowsVB/Documents/ANUSTART/tubii_tk2.cpm is closed.
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03/04/15 17:05:21 Opening project C:/Users/QGPWindowsVB/Documents/ANUSTART/tubii_tk2.cpm
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03/04/15 17:05:21 cdslib C:/Users/QGPWindowsVB/Documents/ANUSTART/cds.lib opened
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03/04/15 17:05:21 Project C:/Users/QGPWindowsVB/Documents/ANUSTART/tubii_tk2.cpm opened
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03/04/15 17:05:27 Loading cell mpsh81 from library transistors
|
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03/04/15 17:05:27 Loading view sym_1 of cell mpsh81
|
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03/04/15 17:05:27 Loading view chips of cell mpsh81
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||||
03/04/15 17:05:27 Loading view entity of cell mpsh81
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03/04/15 17:05:27 Loading cell mpsh81 from library transistors
|
||||
03/04/15 17:05:27 Analyzing view relationships of cell mpsh81 in library transistors
|
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03/04/15 17:05:27 Completed loading cell mpsh81 from library transistors
|
||||
03/04/15 17:05:27 Starting validations on cell mpsh81 of library transistors
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||||
03/04/15 17:05:27 Completed validations on cell mpsh81 of library transistors
|
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03/04/15 17:06:07 Starting validations on cell mpsh81 of library transistors
|
||||
03/04/15 17:06:07 Completed validations on cell mpsh81 of library transistors
|
||||
03/04/15 17:06:07 Completed saving cell mpsh81 in library transistors
|
||||
03/04/15 17:06:09 Project C:/Users/QGPWindowsVB/Documents/ANUSTART/tubii_tk2.cpm is closed.
|
||||
|
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202
temp/translation.sch_1.mkr
Normal file
202
temp/translation.sch_1.mkr
Normal file
@ -0,0 +1,202 @@
|
||||
(marker_file
|
||||
(version 1.0)
|
||||
(markers
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 1)
|
||||
(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
|
||||
(long_msg "Severity : Error (Concept)
|
||||
Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
|
||||
Port name: ecl_to_lvds_in
|
||||
Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
|
||||
Object dump:
|
||||
{
|
||||
port name: ecl_to_lvds_in
|
||||
}
|
||||
{
|
||||
port name: ecl_to_lvds_in
|
||||
}
|
||||
")
|
||||
(location
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal ecl_to_lvds_in;")
|
||||
(parent_canonical_name "DRAWERROR NET ecl_to_lvds_in")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal ecl_to_lvds_in;")
|
||||
(parent_canonical_name "DRAWERROR NET ecl_to_lvds_in")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 2)
|
||||
(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
|
||||
(long_msg "Severity : Error (Concept)
|
||||
Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
|
||||
Port name: ecl_to_ttl_in
|
||||
Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
|
||||
Object dump:
|
||||
{
|
||||
port name: ecl_to_ttl_in
|
||||
}
|
||||
{
|
||||
port name: ecl_to_ttl_in
|
||||
}
|
||||
")
|
||||
(location
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal ecl_to_ttl_in;")
|
||||
(parent_canonical_name "DRAWERROR NET ecl_to_ttl_in")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal ecl_to_ttl_in;")
|
||||
(parent_canonical_name "DRAWERROR NET ecl_to_ttl_in")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 3)
|
||||
(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
|
||||
(long_msg "Severity : Error (Concept)
|
||||
Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
|
||||
Port name: lvds_to_ecl_in_n
|
||||
Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
|
||||
Object dump:
|
||||
{
|
||||
port name: lvds_to_ecl_in_n
|
||||
}
|
||||
{
|
||||
port name: lvds_to_ecl_in_n
|
||||
}
|
||||
")
|
||||
(location
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal lvds_to_ecl_in_n;")
|
||||
(parent_canonical_name "DRAWERROR NET lvds_to_ecl_in_n")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal lvds_to_ecl_in_n;")
|
||||
(parent_canonical_name "DRAWERROR NET lvds_to_ecl_in_n")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 4)
|
||||
(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
|
||||
(long_msg "Severity : Error (Concept)
|
||||
Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
|
||||
Port name: lvds_to_ecl_in_p
|
||||
Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
|
||||
Object dump:
|
||||
{
|
||||
port name: lvds_to_ecl_in_p
|
||||
}
|
||||
{
|
||||
port name: lvds_to_ecl_in_p
|
||||
}
|
||||
")
|
||||
(location
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal lvds_to_ecl_in_p;")
|
||||
(parent_canonical_name "DRAWERROR NET lvds_to_ecl_in_p")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal lvds_to_ecl_in_p;")
|
||||
(parent_canonical_name "DRAWERROR NET lvds_to_ecl_in_p")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 5)
|
||||
(short_msg "ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.")
|
||||
(long_msg "Severity : Error (Concept)
|
||||
Description : ERROR(SPCOCD-168): Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.
|
||||
Port name: nim_to_ecl_out
|
||||
Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
|
||||
Object dump:
|
||||
{
|
||||
port name: nim_to_ecl_out
|
||||
}
|
||||
{
|
||||
port name: nim_to_ecl_out
|
||||
}
|
||||
")
|
||||
(location
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal nim_to_ecl_out;")
|
||||
(parent_canonical_name "DRAWERROR NET nim_to_ecl_out")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal nim_to_ecl_out;")
|
||||
(parent_canonical_name "DRAWERROR NET nim_to_ecl_out")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 6)
|
||||
(short_msg "ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.")
|
||||
(long_msg "Severity : Error (Concept)
|
||||
Description : ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.
|
||||
Port name: lvds_to_ecl_in
|
||||
Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\entity\verilog.v
|
||||
Object dump:
|
||||
{
|
||||
}
|
||||
{
|
||||
port name: lvds_to_ecl_in
|
||||
}
|
||||
")
|
||||
(location
|
||||
(
|
||||
(object_kind "ThisCellView")
|
||||
(canonical_name ";;;")
|
||||
(parent_canonical_name "CONCEPT")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
(
|
||||
(object_kind "ThisEntityPort")
|
||||
(canonical_name "_!drawerror signal lvds_to_ecl_in;")
|
||||
(parent_canonical_name "DRAWERROR NET lvds_to_ecl_in")
|
||||
(drawing_name "<tubii_tk2_lib>TRANSLATION.BODY.1.1")
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
@ -1,69 +0,0 @@
|
||||
(marker_file
|
||||
(version 1.0)
|
||||
(markers
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 1)
|
||||
(short_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named.")
|
||||
(long_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named. (ncwires)")
|
||||
(location
|
||||
(
|
||||
(object_kind "wire")
|
||||
(canonical_name "_!drawerror (-2100,4025);")
|
||||
(parent_canonical_name "unused")
|
||||
(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 2)
|
||||
(short_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named.")
|
||||
(long_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named. (ncwires)")
|
||||
(location
|
||||
(
|
||||
(object_kind "wire")
|
||||
(canonical_name "_!drawerror (-125,3750);")
|
||||
(parent_canonical_name "unused")
|
||||
(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 3)
|
||||
(short_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named.")
|
||||
(long_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named. (ncwires)")
|
||||
(location
|
||||
(
|
||||
(object_kind "wire")
|
||||
(canonical_name "_!drawerror (-125,4050);")
|
||||
(parent_canonical_name "unused")
|
||||
(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
|
||||
)
|
||||
)
|
||||
)
|
||||
(
|
||||
(tool "Concept")
|
||||
(class "SCHEMATIC")
|
||||
(severity 40)
|
||||
(error_num 4)
|
||||
(short_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named.")
|
||||
(long_msg "ERROR(SPCOCN-1981): Wire connected to 1 pin and not named. (ncwires)")
|
||||
(location
|
||||
(
|
||||
(object_kind "wire")
|
||||
(canonical_name "_!drawerror (-125,3950);")
|
||||
(parent_canonical_name "unused")
|
||||
(drawing_name "@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i19@tubii_tk2_lib.translation(sch_1):page1_i1@tubii_tk2_lib.ttl_ecl(sch_1):page1")
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
Binary file not shown.
@ -10,160 +10,48 @@ C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\penn#20b#20size#20page
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\back_ports\sym_1\symbol.css FILE10
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\front_ports\sym_1\symbol.css FILE11
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sym_1\symbol.css FILE12
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sch_1\page1.csb FILE13
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sch_1\page1_csb.lck NEWFILE14
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii\sch_1\page1_csa.lck NEWFILE15
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sym_1\symbol.css FILE16
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\caen_coms\sym_1\symbol.css FILE17
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ecal_control\sym_1\symbol.css FILE18
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\power\sym_1\symbol.css FILE19
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sym_1\symbol.css FILE20
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\mtca_mimic\sym_1\symbol.css FILE21
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clocks\sym_1\symbol.css FILE22
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lo_gen\sym_1\symbol.css FILE23
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\baseline_buffer\sym_1\symbol.css FILE24
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_spkr\sym_1\symbol.css FILE25
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\cntrl_register\sym_1\symbol.css FILE26
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\microzed_module\sym_1\symbol.css FILE27
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sch_1\page1_csa.lck NEWFILE28
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/tubii/sch_1/tubii.xcon FILE29
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/tubii/sch_1/tubii.dcf FILE30
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sch_1\page1.csb FILE31
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sch_1\page1_csb.lck NEWFILE32
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10e116\sym_1\symbol.css FILE33
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10h125\sym_1\symbol.css FILE34
|
||||
temp/xxnedtmp4/undo2.log NEWFILE35
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1.csb FILE36
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1_csb.lck NEWFILE37
|
||||
C:\Cadence\SPB_16.6\share\library\standard\inport\sym_1\symbol.css FILE38
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\generic_delays\sym_1\symbol.css FILE39
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ribbon_delay\sym_1\symbol.css FILE40
|
||||
C:\Cadence\SPB_16.6\share\library\standard\outport\sym_1\symbol.css FILE41
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\pulse_inverter\sym_1\symbol.css FILE42
|
||||
temp/xxnedtmp4/undo3.log NEWFILE43
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\origin\sym_1\symbol.css FILE44
|
||||
temp/xxnedtmp4/undo4.log NEWFILE45
|
||||
temp/xxnedtmp4/undo5.log NEWFILE46
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clocks\sch_1\page1.csb FILE47
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clocks\sch_1\page1_csb.lck NEWFILE48
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10h124\sym_1\symbol.css FILE49
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\74f164\sym_2\symbol.css FILE50
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\change_clks\sym_1\symbol.css FILE51
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\fault_detection\sym_1\symbol.css FILE52
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\capacitors\csmd0603\sym_1\symbol.css FILE53
|
||||
C:\Cadence\SPB_16.6\share\library\standard\8#20merge\sym_1\symbol.css FILE54
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\default_clk_sel\sym_1\symbol.css FILE55
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\default_clk_sel\sch_1\page1.csb FILE56
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\default_clk_sel\sch_1\page1_csb.lck NEWFILE57
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clocks\sch_1\page1_csa.lck NEWFILE58
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\resistors\rsmd0805\sym_1\symbol.css FILE59
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\testpoint_l\sym_1\symbol.css FILE60
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10h104\sym_1\symbol.css FILE61
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\sy100el34l\sym_1\symbol.css FILE62
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\sy100el91l\sym_1\symbol.css FILE63
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\foxclock\sym_1\symbol.css FILE64
|
||||
temp/xxnedtmp4/undo6.log NEWFILE65
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\microzed_module\sch_1\page1.csb FILE66
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\microzed_module\sch_1\page1_csb.lck NEWFILE67
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\fci_61083#2d101400lf\sym_1\symbol.css FILE68
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\microzed_module\sch_1\page1_csa.lck NEWFILE69
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\power\sch_1\page1.csb FILE70
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\power\sch_1\page1_csb.lck NEWFILE71
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\capacitors\tant0805\sym_1\symbol.css FILE72
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\inductor_l\sym_1\symbol.css FILE73
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\led_l\sym_1\symbol.css FILE74
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\capacitors\csmd0805\sym_1\symbol.css FILE75
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\ostoq047150\sym_1\symbol.css FILE76
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\regulators\7915_l\sym_1\symbol.css FILE77
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\regulators\7815s_l\sym_1\symbol.css FILE78
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\regulators\lm337t_l\sym_1\symbol.css FILE79
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\regulators\lm1117\sym_1\symbol.css FILE80
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\power\sch_1\page1_csa.lck NEWFILE81
|
||||
temp/xxnedtmp4/concept.mkr NEWFILE82
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sym_1\symbol.css NEWFILE83
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sym_1\symbol_css.lck NEWFILE84
|
||||
temp/xxnedtmp4/csnetlister.mkr NEWFILE85
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1.csa NEWFILE86
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1.csv NEWFILE87
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\pc.db NEWFILE88
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1_csa.lck NEWFILE89
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/translation/sch_1/translation_xcon.lck NEWFILE90
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/translation/sch_1/translation_dcf.lck NEWFILE91
|
||||
temp/xxnedtmp4/undo7.log NEWFILE92
|
||||
temp/xxnedtmp4/undo8.log NEWFILE93
|
||||
temp/xxnedtmp4/undo9.log NEWFILE94
|
||||
temp/xxnedtmp4/undo10.log NEWFILE95
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sym_1\symbol.css NEWFILE96
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sym_1\symbol_css.lck NEWFILE97
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sch_1\page1.csa NEWFILE98
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sch_1\page1.csv NEWFILE99
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sch_1\pc.db NEWFILE100
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sch_1\page1_csa.lck NEWFILE101
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/ttl_ecl/sch_1/ttl_ecl_xcon.lck NEWFILE102
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/ttl_ecl/sch_1/ttl_ecl_dcf.lck NEWFILE103
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sym_1\symbol.css NEWFILE104
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sym_1\symbol_css.lck NEWFILE105
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sch_1\page1.csa NEWFILE106
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sch_1\page1.csv NEWFILE107
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sch_1\pc.db NEWFILE108
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sch_1\page1_csa.lck NEWFILE109
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/lvds_ecl/sch_1/lvds_ecl_xcon.lck NEWFILE110
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/lvds_ecl/sch_1/lvds_ecl_dcf.lck NEWFILE111
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sym_1\symbol.css NEWFILE112
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sym_1\symbol_css.lck NEWFILE113
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sch_1\page1.csa NEWFILE114
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sch_1\page1.csv NEWFILE115
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sch_1\pc.db NEWFILE116
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sch_1\page1_csa.lck NEWFILE117
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/nim_ecl/sch_1/nim_ecl_xcon.lck NEWFILE118
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/nim_ecl/sch_1/nim_ecl_dcf.lck NEWFILE119
|
||||
C:/Cadence/SPB_16.6/tools/language/config.dat FILE120
|
||||
C:/Cadence/SPB_16.6/tools/language/pack_type_rename.dat NEWFILE121
|
||||
temp/xxnedtmp4/../penn#20b#20size#20page.mkr NEWFILE122
|
||||
temp/xxnedtmp4/../mc10e116.mkr NEWFILE123
|
||||
temp/xxnedtmp4/../mc10h125.mkr NEWFILE124
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sch_1\page1.csa FILE125
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sch_1\page1.csv FILE126
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sch_1\pc.db FILE127
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/ellie_coms/sch_1/ellie_coms_xcon.lck NEWFILE128
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/ellie_coms/sch_1/ellie_coms_dcf.lck NEWFILE129
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sch_1\page1_csa.lck NEWFILE130
|
||||
temp/xxnedtmp4/../translation.mkr NEWFILE131
|
||||
temp/xxnedtmp4/../ribbon_delay.mkr NEWFILE132
|
||||
temp/xxnedtmp4/../generic_delays.mkr NEWFILE133
|
||||
temp/xxnedtmp4/../inport.mkr NEWFILE134
|
||||
temp/xxnedtmp4/../outport.mkr NEWFILE135
|
||||
temp/xxnedtmp4/../pulse_inverter.mkr NEWFILE136
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1.csa FILE137
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1.csv FILE138
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\pc.db FILE139
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/general_utilities/sch_1/general_utilities_xcon.lck NEWFILE140
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/general_utilities/sch_1/general_utilities_dcf.lck NEWFILE141
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1_csa.lck NEWFILE142
|
||||
temp/xxnedtmp4/../nim_ecl.mkr NEWFILE143
|
||||
temp/xxnedtmp4/../lvds_ecl.mkr NEWFILE144
|
||||
temp/xxnedtmp4/../ttl_ecl.mkr NEWFILE145
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1.csb NEWFILE146
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1_csb.lck NEWFILE147
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sch_1\page1.csb NEWFILE148
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sch_1\page1_csb.lck NEWFILE149
|
||||
temp/xxnedtmp4/../sy100el91l.mkr NEWFILE150
|
||||
temp/xxnedtmp4/../rsmd0805.mkr NEWFILE151
|
||||
temp/xxnedtmp4/../mc10h124.mkr NEWFILE152
|
||||
temp/xxnedtmp4/../csmd0603.mkr NEWFILE153
|
||||
temp/xxnedtmp4/../testpoint_l.mkr NEWFILE154
|
||||
temp/xxnedtmp4/../mc10h104.mkr NEWFILE155
|
||||
temp/xxnedtmp4/../sy100el34l.mkr NEWFILE156
|
||||
temp/xxnedtmp4/../foxclock.mkr NEWFILE157
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\default_clk_sel\sch_1\page1.csa FILE158
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\default_clk_sel\sch_1\page1.csv FILE159
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/default_clk_sel/sch_1/default_clk_sel_xcon.lck NEWFILE160
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/default_clk_sel/sch_1/default_clk_sel_dcf.lck NEWFILE161
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\default_clk_sel\sch_1\page1_csa.lck NEWFILE162
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sch_1\page1.csb NEWFILE163
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sch_1\page1_csb.lck NEWFILE164
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sch_1\page1.csb NEWFILE165
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sch_1\page1_csb.lck NEWFILE166
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10h116\sym_1\symbol.css FILE167
|
||||
temp/xxnedtmp4/../csmd0805.mkr NEWFILE168
|
||||
temp/xxnedtmp4/../mc10h116.mkr NEWFILE169
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii\sch_1\page1_csa.lck NEWFILE13
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/tubii/sch_1/tubii.xcon FILE14
|
||||
C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/tubii/sch_1/tubii.dcf FILE15
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sch_1\page1.csb FILE16
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sch_1\page1_csb.lck NEWFILE17
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ellie_coms\sym_1\symbol.css FILE18
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\caen_coms\sym_1\symbol.css FILE19
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ecal_control\sym_1\symbol.css FILE20
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\power\sym_1\symbol.css FILE21
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sym_1\symbol.css FILE22
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\mtca_mimic\sym_1\symbol.css FILE23
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clocks\sym_1\symbol.css FILE24
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lo_gen\sym_1\symbol.css FILE25
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\baseline_buffer\sym_1\symbol.css FILE26
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_spkr\sym_1\symbol.css FILE27
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\cntrl_register\sym_1\symbol.css FILE28
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\microzed_module\sym_1\symbol.css FILE29
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1.csb FILE30
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1_csb.lck NEWFILE31
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\tubii_pcb\sch_1\page1_csa.lck NEWFILE32
|
||||
C:\Cadence\SPB_16.6\share\library\standard\inport\sym_1\symbol.css FILE33
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\generic_delays\sym_1\symbol.css FILE34
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ribbon_delay\sym_1\symbol.css FILE35
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sym_1\symbol.css FILE36
|
||||
C:\Cadence\SPB_16.6\share\library\standard\outport\sym_1\symbol.css FILE37
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\pulse_inverter\sym_1\symbol.css FILE38
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1.csb FILE39
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1_csb.lck NEWFILE40
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\general_utilities\sch_1\page1_csa.lck NEWFILE41
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\capacitors\csmd0805\sym_1\symbol.css FILE42
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\capacitors\csmd0603\sym_1\symbol.css FILE43
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10e116\sym_1\symbol.css FILE44
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\nim_ecl\sym_1\symbol.css FILE45
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\resistors\rsmd0805\sym_1\symbol.css FILE46
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\transistors\mmbth10\sym_1\symbol.css FILE47
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\lvds_ecl\sym_1\symbol.css FILE48
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\transistors\mpsh81\sym_1\symbol.css FILE49
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\misc\ds90lv019\sym_1\symbol.css FILE50
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10h124\sym_1\symbol.css FILE51
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\Parts\parts\ecl\mc10h125\sym_1\symbol.css FILE52
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\ttl_ecl\sym_1\symbol.css FILE53
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sch_1\page1_csa.lck NEWFILE54
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\translation\sym_1\symbol_css.lck NEWFILE55
|
||||
temp/xxnedtmp4/undo2.log NEWFILE56
|
||||
C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\origin\sym_1\symbol.css FILE57
|
||||
|
||||
@ -30,419 +30,22 @@ INFO(SPCOCN-1737): Reading C:\Users\QGPWindowsVB\Documents\ANUSTART\cds.lib file
|
||||
WARNING(SPCOCN-1474): You must specify a window that contains a drawing.
|
||||
INFO(SPCOCN-1445): Reading TUBII.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-195): The following file will be used to identify the list of modules to be excluded: 'C:\Cadence\SPB_16.6\share\cdssetup\xmodules.dat'.
|
||||
INFO(SPCOCN-1445): Reading TUBII.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1001): Component: I9 selected.
|
||||
INFO(SPCOCN-1445): Reading ELLIE_COMS.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1854): The drawing ELLIE_COMS.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #1.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #2.
|
||||
INFO(SPCOCN-1001): Component: I4 selected.
|
||||
INFO(SPCOCN-1445): Reading GENERAL_UTILITIES.SCH.1.1 into drawing #2.
|
||||
INFO(SPCOCN-1854): The drawing GENERAL_UTILITIES.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #2.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #5.
|
||||
INFO(SPCOCN-1001): Component: I2 selected.
|
||||
INFO(SPCOCN-1445): Reading CLOCKS.SCH.1.1 into drawing #5.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1445): Reading DEFAULT_CLK_SEL.SCH.1.1 into drawing #5.
|
||||
ERROR(SPCOCN-1521): Specify a signal name before selecting point.
|
||||
INFO(SPCOCN-1854): The drawing DEFAULT_CLK_SEL.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #5.
|
||||
INFO(SPCOCN-1445): Reading CLOCKS.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1445): Reading MICROZED_MODULE.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1001): Component: I5 selected.
|
||||
INFO(SPCOCN-1001): Component: I5 selected.
|
||||
INFO(SPCOCN-1001): Component: I5 selected.
|
||||
INFO(SPCOCN-1445): Reading POWER.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1445): Reading TUBII_PCB.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1001): Component: I4 selected.
|
||||
INFO(SPCOCN-1443): GENERAL_UTILITIES.SCH.1.1 has been previously edited as drawing #2.
|
||||
INFO(SPCOCN-1445): Reading GENERAL_UTILITIES.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1001): Component: I19 selected.
|
||||
INFO(SPCOCN-1001): Component: I19 selected.
|
||||
INFO(SPCOCN-1443): TRANSLATION.SYM.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TRANSLATION.SYM.1.1:
|
||||
INFO(SPCOCN-1051): writing body file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TRANSLATION.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block translation
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1443): GENERAL_UTILITIES.SCH.1.1 has been previously edited as drawing #2.
|
||||
INFO(SPCOCN-1445): Reading TRANSLATION.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1445): Reading GENERAL_UTILITIES.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1001): Component: I19 selected.
|
||||
INFO(SPCOCN-1854): The drawing GENERAL_UTILITIES.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #2.
|
||||
INFO(SPCOCN-1445): Reading TRANSLATION.SCH.1.1 into drawing #3.
|
||||
INFO(SPCOCN-1507): Adding version 1 of part PENN B SIZE PAGE from library misc
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1443): TTL_ECL.SYM.1.1 has been previously edited as drawing #4.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SYM.1.1:
|
||||
INFO(SPCOCN-1051): writing body file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block ttl_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1001): Component: I2 selected.
|
||||
INFO(SPCOCN-1443): LVDS_ECL.SYM.1.1 has been previously edited as drawing #7.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>LVDS_ECL.SYM.1.1:
|
||||
INFO(SPCOCN-1051): writing body file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>LVDS_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block lvds_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1001): Component: I3 selected.
|
||||
INFO(SPCOCN-1443): NIM_ECL.SYM.1.1 has been previously edited as drawing #9.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>NIM_ECL.SYM.1.1:
|
||||
INFO(SPCOCN-1051): writing body file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>NIM_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block nim_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1854): The drawing TRANSLATION.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #3.
|
||||
INFO(SPCOCN-1445): Reading TTL_ECL.SCH.1.1 into drawing #4.
|
||||
INFO(SPCOCN-1507): Adding version 1 of part PENN B SIZE PAGE from library misc
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1001): Component: I2 selected.
|
||||
INFO(SPCOCN-1854): The drawing TRANSLATION.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #3.
|
||||
INFO(SPCOCN-1445): Reading LVDS_ECL.SCH.1.1 into drawing #6.
|
||||
INFO(SPCOCN-1507): Adding version 1 of part PENN B SIZE PAGE from library misc
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1443): GENERAL_UTILITIES.SCH.1.1 has been previously edited as drawing #2.
|
||||
WARNING(SPCOCN-969): The delete operation could not be performed because no pin was selected. Also, no pin was located near the area you clicked. Ensure that you select the pin to be deleted.
|
||||
WARNING(SPCOCN-969): The delete operation could not be performed because no pin was selected. Also, no pin was located near the area you clicked. Ensure that you select the pin to be deleted.
|
||||
WARNING(SPCOCN-980): The block could not be stretched because a block must have 4 boundary wires and at the most one title wire to be stretchable. Ensure that the block meets the criteria.
|
||||
WARNING(SPCOCN-980): The block could not be stretched because a block must have 4 boundary wires and at the most one title wire to be stretchable. Ensure that the block meets the criteria.
|
||||
WARNING(SPCOCN-980): The block could not be stretched because a block must have 4 boundary wires and at the most one title wire to be stretchable. Ensure that the block meets the criteria.
|
||||
INFO(SPCOCN-1001): Component: I19 selected.
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1001): Component: I3 selected.
|
||||
INFO(SPCOCN-1854): The drawing TRANSLATION.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #3.
|
||||
INFO(SPCOCN-1445): Reading NIM_ECL.SCH.1.1 into drawing #7.
|
||||
INFO(SPCOCN-1507): Adding version 1 of part PENN B SIZE PAGE from library misc
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>ELLIE_COMS.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block ellie_coms
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>GENERAL_UTILITIES.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block general_utilities
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TRANSLATION.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block translation
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block ttl_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>DEFAULT_CLK_SEL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block default_clk_sel
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>LVDS_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block lvds_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>NIM_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block nim_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1019): Save All completed.
|
||||
zoom left;
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1507): Adding version 1 of part MC10H116 from library ecl
|
||||
INFO(SPCOCN-1507): Adding version 1 of part MC10H116 from library ecl
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1854): The drawing TRANSLATION.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #3.
|
||||
INFO(SPCOCN-1445): Reading TTL_ECL.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1507): Adding version 1 of part MC10H125 from library ecl
|
||||
INFO(SPCOCN-1507): Adding version 1 of part MC10H124 from library ecl
|
||||
INFO(SPCOCN-1507): Adding version 1 of part INPORT from library standard
|
||||
INFO(SPCOCN-1507): Adding version 1 of part INPORT from library standard
|
||||
INFO(SPCOCN-1507): Adding version 1 of part INPORT from library standard
|
||||
INFO(SPCOCN-1507): Adding version 1 of part OUTPORT from library standard
|
||||
INFO(SPCOCN-1507): Adding version 1 of part OUTPORT from library standard
|
||||
INFO(SPCOCN-1507): Adding version 1 of part OUTPORT from library standard
|
||||
INFO(SPCOCN-1507): Adding version 1 of part CSMD0805 from library capacitors
|
||||
INFO(SPCOCN-1507): Adding version 1 of part CSMD0805 from library capacitors
|
||||
INFO(SPCOCN-1507): Adding version 1 of part CSMD0805 from library capacitors
|
||||
INFO(SPCOCN-1507): Adding version 1 of part CSMD0805 from library capacitors
|
||||
WARNING(SPCOCN-982): The operation could not be performed because no object on the drawing was selected.
|
||||
zoom up;
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block ttl_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
Following ports were added to the block 'ttl_ecl' :
|
||||
ecl_in_n
|
||||
ecl_in_p
|
||||
ecl_out_n
|
||||
ecl_out_p
|
||||
ttl_in
|
||||
ttl_out
|
||||
The connectivity of parent blocks will be updated by saving the following pages:
|
||||
Block: translation Page: 1
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1019): Save All completed.
|
||||
INFO(SPCOCN-1443): TRANSLATION.SCH.1.1 has been previously edited as drawing #3.
|
||||
INFO(SPCOCN-1001): Component: I2 selected.
|
||||
INFO(SPCOCN-1001): Component: I2 selected.
|
||||
INFO(SPCOCN-1001): Component: I2 selected.
|
||||
INFO(SPCOCN-1854): The drawing TRANSLATION.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #3.
|
||||
INFO(SPCOCN-1445): Reading LVDS_ECL.SCH.1.1 into drawing #2.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SYM.1.1:
|
||||
INFO(SPCOCN-1051): writing body file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TRANSLATION.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block translation
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1019): Save All completed.
|
||||
INFO(SPCOCN-1445): Reading TTL_ECL.SYM.1.1 into drawing #2.
|
||||
INFO(SPCOCN-1304): Could not find signal ECL_OUT_N
|
||||
INFO(SPCOCN-1445): Reading LVDS_ECL.SCH.1.1 into drawing #2.
|
||||
INFO(SPCOCN-1445): Reading TRANSLATION.SCH.1.1 into drawing #2.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SYM.1.1:
|
||||
INFO(SPCOCN-1051): writing body file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1019): Save All completed.
|
||||
INFO(SPCOCN-1001): Component: I1 selected.
|
||||
INFO(SPCOCN-1854): The drawing TRANSLATION.SCH.1.1
|
||||
INFO(SPCOCN-578): will be retained as drawing #2.
|
||||
INFO(SPCOCN-1445): Reading TTL_ECL.SCH.1.1 into drawing #1.
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TTL_ECL.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block ttl_ecl
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1070): Checking drawing...
|
||||
INFO(SPCOCN-1028): writing <tubii_tk2_lib>TRANSLATION.SCH.1.1:
|
||||
INFO(SPCOCN-1044): writing binary file...
|
||||
INFO(SPCOCN-1049): writing ASCII file...
|
||||
INFO(SPCOCN-1053): writing connectivity file...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
|
||||
CSDirect 16.6-p007 (v16-6-112F)
|
||||
|
||||
Netlisting block translation
|
||||
|
||||
Processing page 1
|
||||
|
||||
No netlisting errors found.
|
||||
|
||||
INFO(SPCOCN-1640): writing occurrence data...
|
||||
INFO(SPCOCN-1054): ...written
|
||||
INFO(SPCOCN-1019): Save All completed.
|
||||
INFO(SPCOCN-1001): Component: I19 selected.
|
||||
INFO(SPCOCN-1001): Component: I19 selected.
|
||||
WARNING(SPCOCN-1511): The component could not be added because you did not select the part in Component Browser before clicking the schematic. First select a part from a library in Component Browser, and then click the schematic.
|
||||
|
||||
Binary file not shown.
Binary file not shown.
LOADING design file
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user