11 lines
229 B
VHDL
11 lines
229 B
VHDL
-- generated by newgenasym Thu May 28 14:27:53 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity srr6038 is
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port (
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\1\: INOUT STD_LOGIC;
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\2\: INOUT STD_LOGIC);
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end srr6038;
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