14 lines
331 B
VHDL
14 lines
331 B
VHDL
-- generated by newgenasym Wed May 13 15:08:28 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity ths3061 is
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port (
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\vin+\: INOUT STD_LOGIC;
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\vin-\: INOUT STD_LOGIC;
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VOUT: INOUT STD_LOGIC;
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\vs+\: IN STD_LOGIC;
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\vs-\: IN STD_LOGIC);
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end ths3061;
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