23 lines
643 B
VHDL
23 lines
643 B
VHDL
-- generated by newgenasym Mon May 18 14:15:05 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity \74hct164\ is
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port (
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CP: IN STD_LOGIC;
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DSA: IN STD_LOGIC;
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DSB: IN STD_LOGIC;
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GND: IN STD_LOGIC;
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\mr*\: IN STD_LOGIC;
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Q0: OUT STD_LOGIC;
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Q1: OUT STD_LOGIC;
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Q2: OUT STD_LOGIC;
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Q3: OUT STD_LOGIC;
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Q4: OUT STD_LOGIC;
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Q5: OUT STD_LOGIC;
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Q6: OUT STD_LOGIC;
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Q7: OUT STD_LOGIC;
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VCC: IN STD_LOGIC);
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end \74hct164\;
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