Tubii_Tk2/Parts/parts/ttl/ds1023500/entity/verilog.v
2015-06-01 13:43:47 -04:00

29 lines
465 B
Verilog

// generated by newgenasym Mon Jun 01 12:07:16 2015
module ds1023500 (\clk/p1 , \d/p2 , gnd, in, \le* , ms, out, p3, p4, p5, p6, p7, ps, pwm,
\q/p0 , vcc);
input \clk/p1 ;
input \d/p2 ;
input gnd;
input in;
input \le* ;
input ms;
output out;
input p3;
input p4;
input p5;
input p6;
input p7;
input ps;
output pwm;
input \q/p0 ;
input vcc;
initial
begin
end
endmodule