16 lines
429 B
VHDL
16 lines
429 B
VHDL
-- generated by newgenasym Mon Jun 01 12:07:39 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity ds102350bkup is
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port (
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\in\: IN STD_LOGIC;
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\le*\: IN STD_LOGIC;
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MS: IN STD_LOGIC;
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\out\: OUT STD_LOGIC;
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P: IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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PS: IN STD_LOGIC;
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PWM: OUT STD_LOGIC);
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end ds102350bkup;
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