1911 lines
182 KiB
Plaintext
1911 lines
182 KiB
Plaintext
(NETLIST)
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(FOR DRAWING: C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/tubii/physical/TubiiPCB_V3.brd)
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(GENERATED BY: ALLEGRO 16.6 P004 (v16-6-112G))
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(Mon May 04 09:35:12 2015)
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$PACKAGES
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3006_TRIMPOT ! 3006P_TRIMPOT ; U149 U150
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CAP0603 ! 'CSMD0603-0.1UF,10%,0603,50V' ! '0.1UF' ; C1 C2 C3 C11 C12 C13 ,
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C14 C15 C22 C23 C24 C25 C26 C27 C28 C29 C30 C32 C33 C34 C35 C36 C37 ,
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C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C84 C85 C86 C87 C89 ,
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C101 C102 C103 C104 C105 C110 C111 C112 C113 C114 C115 C116 C117 ,
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C118 C119 C120 C121 C122 C124 C125 C126 C127 C128 C129 C130 C131 ,
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C132 C133 C135 C136
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CAP0603 ! 'CSMD0603-0.1UF,5%,0603,50V' ! '0.1UF' ; C52 C53 C54 C55 C56 C57 ,
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C60 C62 C63 C66 C96 C97 C98 C183
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CAP0603 ! 'CSMD0603-1.0UF,10%,0603,25V' ! '1.0UF' ; C4 C5 C6 C7 C9 C50
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CAP0603 ! 'CSMD0603-10NF,10%,0603,25V' ! 10NF ; C31
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CAP805 ! 'CSMD0805-0.1UF,5%,0805,50V' ! '0.1UF' ; C8 C10 C49 C51 C58 C59 ,
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C61 C64 C65 C76 C78 C88 C90 C91 C92 C93 C94 C99 C100 C123 C137 C138 ,
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C139 C140 C181 C182
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CAP805 ! 'CSMD0805-0.33UF,10%,0805,25V' ! '0.33UF' ; C71 C72
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CAP805 ! 'CSMD0805-1.0UF,10%,0805,25V' ! '1.0UF' ; C16 C17 C18 C19 C20 C21
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CAP805 ! 'CSMD0805-100NF,10%,0805,25V' ! 100NF ; C95
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CAP805 ! 'CSMD0805-10NF,10%,0805,25V' ! 10NF ; C83
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CAP805 ! 'CSMD0805-15PF,10%,0805,25V' ! 15PF ; C134
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CAP805 ! 'CSMD0805-1UF,10%,0805,25V' ! 1UF ; C106 C107 C108 C109 C141 C142 ,
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C143 C144 C145 C146 C147 C148 C149 C150 C151 C152 C153 C154 C155 ,
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C156 C157 C158 C159 C160 C161 C162 C163 C164 C165 C166 C167 C168 ,
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C169 C170 C171 C172 C173 C174 C175 C176 C177 C178 C179 C180
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CAP805 ! 'TANT0805-0.1UF,5%,0805,50V' ! '0.1UF' ; C73 C74 C82
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CAP805 ! 'TANT0805-10UF,5%,0805,25V' ! 10UF ; C67 C68 C77 C80
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CAP805 ! 'TANT0805-1UF,10%,0805,25V' ! 1UF ; C69 C70 C75 C79 C81
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CONN10 ! IDS_C10 ; U6 U16 U53 U54 U80
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CONN12 ! CONN12 ; J2
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CONN20 ! CONN20 ; J3
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CONN32 ! CONN32 ; U148
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COTO2300_V1 ! COTO2342 ; U107 U112 U117 U122 U127 U132 U137 U142
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D6R10F1_BUTTON ! DR610F1_BUTTON ; U151
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DO35 ! 1N4448 ; U109 U110 U114 U115 U119 U120 U124 U125 U129 U130 U134 U135 ,
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U139 U140 U144 U145
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FCI_61083_CONNECTOR ! 'FCI_61083-101400LF' ; U5 U65
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FEC32DTP ! TESTPOINT_L ; TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 ,
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TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20 TP21 TP22 TP23 TP24 TP25 ,
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TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 ,
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TP39 TP64 TP65 TP68 TP69 TP76 TP77 TP78 TP79 TP80 TP81 TP82 TP83 ,
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TP84 TP85 TP86 TP87 TP88 TP89 TP90 TP91 TP92 TP93 TP94 TP95 TP110 ,
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TP111 TP112 TP113 TP114 TP115 TP116 TP117 TP118 TP119 TP120 TP121 ,
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TP122 TP123 TP124 TP125 TP126 TP127 TP128 TP129 TP130 TP131 TP132 ,
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TP133 TP134 TP135 TP136 TP137 TP138 TP139 TP140 TP141 TP142 TP143 ,
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TP144 TP145 TP146 TP147 TP148 TP149 TP150 TP151 TP152 TP153 TP154 ,
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TP155 TP156 TP157 TP158 TP159 TP160 TP161 TP162 TP163 TP164 TP165 ,
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TP166 TP167 TP168 TP169 TP170 TP171 TP172 TP173 TP174 TP175 TP176 ,
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TP177 TP178 TP179 TP180 TP181 TP182 TP183 TP184 TP185 TP186 TP187 ,
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TP188 TP189 TP190 TP191 TP192 TP193 TP194 TP195 TP196 TP197 TP198
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INDUCT400 ! INDUCTOR_L ; L1 L2 L3 L4
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LED1206 ! 'LED_1206-RED,RED,1206,16V' ! Red ; LED1 LED2
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LED_SSFLXH1031D ! LED_L ; D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 ,
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D17 D18
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OSTOQ047150 ! OSTOQ047150 ; U48 U49
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P113FC ! PICKERING113FC ; U102 U103 U104 U105
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PLCC20 ! MC10H104 ; U12 U30 U32 U39 U40 U84
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PLCC20 ! MC10H116 ; U34 U51 U52
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PLCC20 ! MC10H124 ; U8 U10 U29 U31 U33 U57 U67 U68 U94
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PLCC20 ! MC10H125 ; U18 U24 U35 U45 U56 U78 U79 U93
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PLCC20 ! MC10H131 ; U41 U42 U46 U73 U85
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PLCC28 ! MC10E016 ; U82
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PLCC28 ! MC10E101 ; U44
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PLCC28 ! MC10E116 ; U11 U17 U21 U43 U55 U74 U75 U83
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RES805 ! RES_L ; R194 R195 R196 R197 R198 R201 R203 R204 R208 R211 R212 ,
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R213 R214 R215 R218 R220 R221 R225 R228 R229 R230 R231 R232 R235 ,
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R237 R238 R242 R245 R246 R247 R248 R249 R252 R254 R255 R259 R262 ,
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R263 R264 R265 R266 R269 R271 R272 R276 R279 R280 R281 R282 R283 ,
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R286 R288 R289 R293 R296 R297 R298 R299 R300 R303 R305 R306 R310 ,
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R313 R314 R315 R316 R317 R320 R322 R323 R327
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RES805 ! 'RSMD0805-0,1%,0805' ! 0 ; R205 R206 R207 R209 R222 R223 R224 R226 ,
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R239 R240 R241 R243 R256 R257 R258 R260 R273 R274 R275 R277 R290 ,
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R291 R292 R294 R307 R308 R309 R311 R324 R325 R326 R328
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RES805 ! 'RSMD0805-10,1%,0805' ! 10 ; R200 R217 R234 R251 R268 R285 R302 ,
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R319
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RES805 ! 'RSMD0805-100,1%,0805' ! 100 ; R3 R4 R5 R12 R28 R40 R41 R76 R77 ,
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R181 R182 R183 R184 R185 R186
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RES805 ! 'RSMD0805-1000,1%,0805' ! 1000 ; R18 R19 R66 R68 R78 R79 R82 R83 ,
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R84 R85 R86 R87 R108 R109 R110 R111 R112 R113 R114 R115
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RES805 ! 'RSMD0805-10K,1%,0805' ! 10K ; R1 R2 R38 R39 R72 R75 R354 R355
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RES805 ! 'RSMD0805-111,1%,0805' ! 111 ; R199 R216 R233 R250 R267 R284 R301 ,
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R318
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RES805 ! 'RSMD0805-120,1%,0805' ! 120 ; R81
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RES805 ! 'RSMD0805-2K,1%,0805' ! 2K ; R180 R193 R210 R227 R244 R261 R278 ,
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R295 R312
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RES805 ! 'RSMD0805-499,1%,0805' ! 499 ; R140 R141 R142 R143 R144 R145 R146 ,
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R147 R167 R202 R219 R236 R253 R270 R287 R304 R321
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RES805 ! 'RSMD0805-5.1K,1%,0805' ! '5.1K' ; R351 R352 R353 R356 R357 R358 ,
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R359 R360 R361 R362
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RES805 ! 'RSMD0805-50,1%,0805' ! 50 ; R6 R7 R8 R9 R10 R11 R13 R14 R15 R16 ,
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R17 R20 R21 R22 R23 R24 R25 R26 R27 R29 R30 R31 R32 R33 R34 R35 R36 ,
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R37 R42 R43 R44 R45 R46 R47 R48 R49 R50 R51 R52 R53 R54 R55 R56 R57 ,
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R58 R59 R60 R61 R62 R63 R64 R65 R67 R69 R70 R71 R73 R74 R88 R89 R90 ,
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R91 R92 R93 R94 R95 R96 R97 R98 R99 R100 R101 R102 R103 R104 R105 ,
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R106 R107 R116 R117 R118 R119 R120 R121 R122 R123 R124 R125 R126 ,
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R127 R128 R129 R130 R131 R132 R133 R134 R135 R136 R137 R138 R139 ,
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R148 R149 R150 R151 R152 R153 R154 R155 R156 R157 R158 R159 R160 ,
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R161 R162 R163 R164 R165 R166 R175 R176 R177 R178 R179 R187 R188 ,
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R189 R190 R191 R192 R329 R330 R331 R332 R333 R334 R335 R336 R337 ,
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R338 R339 R340 R341 R342 R343 R344 R345 R346 R347 R348 R349 R350 ,
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R363
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RES805 ! 'RSMD0805-71.5,1%,0805' ! '71.5' ; R80
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SIP16 ! SIP_HEADER_16PIN ; J1
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SIP2 ! SIP_HEADER_2PIN ; U87 U88 U89 U90 U91 U92
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SMD_FOX ! FOXCLOCK ; U26
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SOIC14 ! 74F06 ; U63 U64
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SOIC14 ! 74F07 ; U76 U77 U101
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SOIC14 ! 74F164_2 ; U2 U66 U97 U98
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SOIC14 ! DS90LV019 ; U58
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SOIC14 ! OPA4277 ; U13 U14
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SOIC14 ! SN74S32 ; U152
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SOIC16 ! AD96687 ; U70
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SOIC16 ! DS1023200 ; U1
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SOIC16 ! DS102350 ; U36 U37
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SOIC16 ! DS1023500 ; U7
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SOIC16 ! HCT123 ; U9 U38 U47 U62 U95
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SOIC16 ! SY100EL34L ; U28 U86
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SOIC16W ! AD7243 ; U69
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SOIC20 ! 74HCT273 ; U96
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SOIC20 ! HCT374_1 ; U4 U99 U100
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SOIC20W ! SY100EL91L ; U27
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SOIC8 ! AD8009_SOIC ; U50
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SOIC8 ! DS90LV027 ; U20
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SOIC8 ! OPA2277_SOIC ; U15
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SOIC8 ! OPA277 ; U147
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SOIC8 ! REF02 ; U146
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SOIC8 ! SY100EL05 ; U22 U23 U81
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SOIC8 ! THS3062 ; U106 U108 U111 U113 U116 U118 U121 U123 U126 U128 U131 ,
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U133 U136 U138 U141 U143
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SOT223 ! LM1117 ; Q4
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SOT23 ! MMBTH10 ; U59
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SOT23 ! MMBTH81 ; U19
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SS22SDP2 ! SS22SDP2 ; U25 U71 U72
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SSOP16 ! 74HCT165 ; U3
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TO220ABH ! 7815S_L ; Q2
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TO220ABV ! 7915_L ; Q1
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TO220ABV ! LM337T_L ; Q3
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TO92 ! MPSH81 ; U60
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TSSOP16 ! HCT238_TSSOP ; U61
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$NETS
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'BACKPLANE_IN<10>' ; U6.9 U15.5
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'BACKPLANE_IN<1>' ; U6.1 U13.3
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'BACKPLANE_IN<2>' ; U6.3 U13.5
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'BACKPLANE_IN<3>' ; U6.5 U13.10
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'BACKPLANE_IN<4>' ; U6.7 U13.12
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'BACKPLANE_IN<5>' ; U6.2 U14.3
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'BACKPLANE_IN<6>' ; U6.4 U14.5
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'BACKPLANE_IN<7>' ; U6.6 U14.10
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'BACKPLANE_IN<8>' ; U6.8 U14.12
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'BACKPLANE_IN<9>' ; U6.10 U15.2
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'BACKPLANE_OUT<10>' ; U15.6 U15.7 U16.9
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'BACKPLANE_OUT<1>' ; U13.1 U13.2 U16.1
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'BACKPLANE_OUT<2>' ; U13.6 U13.7 U16.3
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'BACKPLANE_OUT<3>' ; U13.8 U13.9 U16.5
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'BACKPLANE_OUT<4>' ; U13.13 U13.14 U16.7
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'BACKPLANE_OUT<5>' ; U14.1 U14.2 U16.2
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'BACKPLANE_OUT<6>' ; U14.6 U14.7 U16.4
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'BACKPLANE_OUT<7>' ; U14.8 U14.9 U16.6
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'BACKPLANE_OUT<8>' ; U14.13 U14.14 U16.8
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'BACKPLANE_OUT<9>' ; U15.1 U15.3 U16.10
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'BCKP_CLK*' ; R27.2 TP12.1 U30.12
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BCKP_CLK_BUFD_N ; R162.2 U81.4 U83.12
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BCKP_CLK_BUFD_P ; R163.2 U81.3 U83.11
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'CARRIER_SRST#' ; U5.6
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CHANGE_CLK2_N ; R336.2 U21.15 U24.3
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CHANGE_CLK2_P ; R338.2 U21.14 U24.4
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CHOSEN_CLK2_N ; R332.2 U21.26 U24.8 U25.5
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CHOSEN_CLK2_P ; R331.2 U21.25 U24.9 U25.2
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CHOSEN_CLK_N ; R347.2 U22.6 U23.6 U25.6
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CHOSEN_CLK_P ; R345.2 U22.7 U23.7 U25.3
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CLK_BAD_N ; R178.1 U81.2 U94.5
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CLK_BAD_P ; R177.1 U81.1 U94.3
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CLK_MISSED ; R182.1 U96.2
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CLK_SEL_ECL_N ; R25.2 U29.5 U30.9 U30.14
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CLK_SEL_ECL_P ; R26.2 U29.3 U30.7 U30.17
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CLK_STATE ; R175.2 U84.7 U85.4
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'CNTRL_RAW<0>' ; TP8.1 U2.3 U3.11 U4.2
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'CNTRL_RAW<1>' ; TP7.1 U2.4 U3.12 U4.3
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'CNTRL_RAW<2>' ; TP6.1 U2.5 U3.13 U4.4
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'CNTRL_RAW<3>' ; TP5.1 U2.6 U3.14 U4.5
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'CNTRL_RAW<4>' ; TP4.1 U2.10 U3.3 U4.6
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'CNTRL_RAW<5>' ; TP3.1 U2.11 U3.4 U4.7
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'CNTRL_RAW<6>' ; TP2.1 U2.12 U3.5 U4.8
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'CNTRL_RAW<7>' ; TP1.1 U2.13 U3.6 U4.9
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COMP1_THRESH ; TP31.1 U69.14 U70.7
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COMP2_THRESH ; TP30.1 U70.10 U150.2
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COUNT ; R159.1 U81.7 U82.27 U85.8
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'COUNT_DATA_ECL<0>' ; R148.1 U68.3 U82.3
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'COUNT_DATA_ECL<1>' ; R149.1 U68.2 U82.4
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'COUNT_DATA_ECL<2>' ; R150.1 U68.19 U82.5
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'COUNT_DATA_ECL<3>' ; R151.1 U68.18 U82.6
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'COUNT_DATA_ECL<4>' ; R152.1 U67.3 U82.7
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'COUNT_DATA_ECL<5>' ; R153.1 U67.2 U82.21
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'COUNT_DATA_ECL<6>' ; R154.1 U67.19 U82.22
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'COUNT_DATA_ECL<7>' ; R155.1 U67.18 U82.23
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DDGT_BITS ; U1.3 U7.5
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DDGT_TTL ; U7.9 U8.9 U9.10
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DEF_CLK_DIV2_N ; U86.2 U88.1
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DEF_CLK_DIV2_P ; U86.1 U87.1
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DEF_CLK_DIV4_N ; U86.5 U90.1
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DEF_CLK_DIV4_P ; U86.4 U89.1
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DEF_CLK_DIV8_N ; U86.8 U92.1
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DEF_CLK_DIV8_P ; U86.7 U91.1
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DEF_CLK_DIVD_N ; R176.2 U88.2 U90.2 U92.2 U93.4
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DEF_CLK_DIVD_P ; R179.2 U87.2 U89.2 U91.2 U93.3
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DGT_GATE ; R53.2 TP122.1 U40.7 U40.9 U40.14 U40.17 U73.3
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DGT_TTL ; U1.15 U8.7 U8.13 U9.2
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DIVD_CLK_TTL ; U93.5 U95.2
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ECAL_ACTIVE_ECL_N ; R29.2 U31.5 U32.8
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ECAL_ACTIVE_ECL_P ; R30.2 U31.3 U32.5
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EN_CLK_DIV_ECL ; R23.2 U28.15 U29.19
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FOX_100MHZ_P ; R24.2 U28.1 U30.5 U30.13
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FOX_CLK_LVPECL_N ; U26.5 U27.3
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FOX_CLK_LVPECL_P ; U26.4 U27.2
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FPGA_DONE ; U5.8
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FUZZD_CLK_N ; U94.7 U95.4 U96.11
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FUZZD_CLK_P ; R181.1 U95.13
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GND ; C2.1 C3.2 C4.2 C5.1 C6.1 C7.2 C8.1 C9.2 C10.1 C11.1 C12.2 C13.2 C14.1 ,
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C15.1 C22.2 C23.2 C24.1 C25.2 C26.2 C27.2 C28.1 C29.1 C30.1 C31.2 ,
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C32.2 C33.1 C34.1 C35.2 C36.1 C37.1 C38.2 C39.1 C40.1 C41.1 C42.2 ,
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C43.2 C44.1 C45.2 C46.1 C47.1 C48.1 C49.1 C50.2 C51.1 C52.1 C53.1 ,
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C54.1 C55.1 C56.1 C57.2 C58.2 C59.1 C60.2 C61.1 C62.1 C63.2 C64.1 ,
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C65.1 C66.2 C67.1 C68.2 C69.1 C70.2 C71.1 C72.1 C73.1 C74.2 C76.1 ,
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C77.1 C78.1 C80.1 C81.1 C82.1 C83.2 C86.2 C87.2 C88.1 C89.2 C90.2 ,
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C91.2 C92.1 C93.1 C94.1 C96.2 C97.1 C98.1 C101.1 C102.2 C103.2 ,
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C104.1 C105.1 C110.1 C111.1 C112.1 C113.1 C115.2 C116.2 C117.2 ,
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C118.2 C119.2 C120.2 C121.1 C122.1 C123.1 C124.2 C125.2 C126.2 ,
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C127.2 C128.2 C129.1 C130.2 C131.1 C132.2 C133.1 C134.1 C135.1 ,
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C136.2 C137.1 C138.1 C139.2 C140.2 C142.1 C143.2 C144.1 C145.2 ,
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C147.1 C148.2 C149.1 C150.2 C152.1 C153.2 C154.1 C155.2 C157.1 ,
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C158.2 C159.1 C160.2 C162.1 C163.2 C164.1 C165.2 C167.1 C168.2 ,
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C169.1 C170.2 C172.1 C173.2 C174.1 C175.2 C177.1 C178.2 C179.1 ,
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C180.2 C181.2 C182.1 C183.2 D1.1 D2.1 D3.1 D4.1 D5.1 D6.1 D7.1 D8.1 ,
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D9.2 D10.1 D11.2 D12.1 D13.2 D14.1 D17.1 D18.1 J1.1 J2.5 J2.7 J2.10 ,
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J3.1 J3.3 J3.9 J3.11 J3.13 J3.15 J3.17 J3.19 LED1.1 LED2.1 Q1.1 ,
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Q2.2 Q4.1 R18.2 R167.1 R198.1 R199.1 R202.2 R215.1 R216.1 R219.2 ,
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R232.1 R233.1 R236.2 R249.1 R250.1 R253.2 R266.1 R267.1 R270.2 ,
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R283.1 R284.1 R287.2 R300.1 R301.1 R304.2 R317.1 R318.1 R321.2 ,
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R351.2 R352.2 R353.2 R356.1 R357.1 R358.1 R359.1 R360.1 R361.1 ,
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R362.2 TP18.1 TP19.1 TP20.1 TP23.1 TP26.1 TP27.1 TP28.1 TP29.1 ,
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TP65.1 TP69.1 TP77.1 TP78.1 TP79.1 TP80.1 TP81.1 TP111.1 TP113.1 ,
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TP115.1 TP121.1 TP142.1 TP144.1 TP146.1 TP148.1 TP150.1 TP152.1 ,
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TP154.1 TP156.1 TP158.1 TP160.1 TP162.1 TP164.1 TP166.1 TP168.1 ,
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TP170.1 TP172.1 TP174.1 TP176.1 TP178.1 TP180.1 TP182.1 TP184.1 ,
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TP186.1 TP188.1 TP190.1 TP192.1 TP194.1 TP196.1 TP198.1 U1.8 U1.11 ,
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U3.8 U4.10 U5.15 U5.16 U5.21 U5.22 U5.27 U5.28 U5.33 U5.34 U5.39 ,
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U5.40 U5.45 U5.46 U5.51 U5.52 U5.65 U5.66 U5.71 U5.72 U5.77 U5.85 ,
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U5.86 U5.95 U5.96 U7.8 U7.11 U8.20 U9.1 U9.6 U9.8 U9.9 U9.14 U10.20 ,
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U11.7 U11.10 U11.13 U11.16 U11.19 U11.22 U12.2 U12.20 U17.7 U17.10 ,
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U17.13 U17.16 U17.19 U17.22 U18.20 U20.4 U21.7 U21.10 U21.13 U21.16 ,
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U21.19 U21.22 U22.8 U23.8 U24.20 U26.3 U27.14 U27.17 U28.3 U28.6 ,
|
|
U28.16 U29.13 U29.20 U30.2 U30.20 U31.20 U32.2 U32.20 U33.20 U34.2 ,
|
|
U34.20 U35.20 U36.8 U36.11 U37.8 U37.11 U38.1 U38.6 U38.8 U38.9 ,
|
|
U38.14 U39.2 U39.20 U40.2 U40.20 U41.2 U41.20 U42.2 U42.20 U43.7 ,
|
|
U43.10 U43.13 U43.16 U43.19 U43.22 U44.11 U44.16 U44.21 U45.20 ,
|
|
U46.2 U46.20 U47.1 U47.6 U47.8 U47.9 U47.14 U48.2 U48.3 U49.2 U49.3 ,
|
|
U50.3 U51.2 U51.20 U52.2 U52.20 U55.7 U55.10 U55.13 U55.16 U55.19 ,
|
|
U55.22 U56.20 U57.20 U58.7 U58.8 U59.3 U61.6 U61.8 U62.1 U62.8 ,
|
|
U63.7 U64.7 U65.15 U65.16 U65.21 U65.22 U65.27 U65.28 U65.33 U65.34 ,
|
|
U65.39 U65.40 U65.45 U65.46 U65.51 U65.52 U65.65 U65.66 U65.71 ,
|
|
U65.72 U65.77 U65.85 U65.86 U65.95 U65.96 U66.7 U67.20 U68.20 U69.8 ,
|
|
U69.10 U69.12 U70.3 U70.14 U73.2 U73.20 U74.7 U74.10 U74.13 U74.16 ,
|
|
U74.19 U74.22 U76.7 U77.7 U78.20 U79.20 U80.3 U80.4 U80.5 U80.6 ,
|
|
U81.8 U82.8 U82.14 U82.16 U82.20 U83.7 U83.10 U83.13 U83.16 U83.19 ,
|
|
U83.22 U84.2 U84.20 U85.2 U85.20 U86.3 U86.6 U86.16 U93.20 U94.20 ,
|
|
U95.1 U95.3 U95.8 U95.15 U96.10 U97.7 U98.7 U99.1 U99.10 U100.1 ,
|
|
U100.10 U101.7 U109.2 U114.2 U119.2 U124.2 U129.2 U134.2 U139.2 ,
|
|
U144.2 U146.4 U147.3 U148.2 U148.4 U148.6 U148.8 U148.10 U148.12 ,
|
|
U148.14 U148.16 U148.18 U148.20 U148.22 U148.24 U148.26 U148.28 ,
|
|
U148.30 U148.32 U149.1
|
|
GPIO0 ; U65.3
|
|
GPIO1 ; U65.4
|
|
GPIO2 ; U65.5
|
|
GPIO3 ; U65.6
|
|
GPIO4 ; U65.7
|
|
GPIO5 ; U65.8
|
|
GT2_N ; U17.21
|
|
GT_2 ; R13.1 U17.14 U19.1
|
|
I2C_SCL ; U65.1
|
|
I2C_SDA ; U65.2
|
|
JTAG_TDI ; U5.4
|
|
JTAG_TMS ; U5.2
|
|
JX1_GUIDE_PIN1 ; U5.102
|
|
JX1_GUIDE_PIN2 ; U5.101
|
|
JX1_SE_1 ; U5.10
|
|
JX2_GUIDE_PIN1 ; U65.102
|
|
JX2_GUIDE_PIN2 ; U65.101
|
|
LE_CAEN ; U61.14 U97.2 U98.2
|
|
LE_CLKS ; U61.10 U66.1
|
|
LE_CNTRL_REG ; U2.2 U61.15
|
|
LE_GEN_UTILS ; U36.2 U37.2 U61.11
|
|
LE_GT_DELAYS ; U1.2 U7.2 U61.12
|
|
LE_MTCA_MIMIC ; U61.13 U69.7
|
|
'LOAD_COUNT*' ; R156.1 U82.25 U94.4
|
|
LO_SEL_ECL_N ; R9.2 U10.5 U12.8
|
|
LO_SEL_ECL_P ; R10.2 U10.3 U12.5
|
|
LO_STAR_RAW ; R7.2 U11.5 U11.27 U12.3 U12.4
|
|
NEG_TRIG1 ; R51.2 TP125.1 U39.4 U40.8 U44.8
|
|
NEG_TRIG2 ; R49.2 TP124.1 U39.19 U40.15 U44.4
|
|
POS_TRIG1 ; R52.2 TP123.1 U39.3 U40.5 U44.9
|
|
POS_TRIG2 ; R50.2 TP126.1 U39.18 U40.13 U44.5
|
|
PREP_RETRIG1 ; R58.2 TP129.1 U41.3 U42.9
|
|
PREP_RETRIG2 ; R57.2 TP130.1 U41.19 U42.13
|
|
RESET_CLK_DIV_ECL ; R22.2 U28.10 U29.2
|
|
RESTART_COUNT ; R158.2 U82.24 U84.3
|
|
RETRIG_GATE1 ; R61.2 TP133.1 U42.3 U44.10
|
|
RETRIG_GATE2 ; R60.2 TP134.1 U42.19 U44.6
|
|
RIB10_N ; R99.2 U51.15 U54.9
|
|
RIB10_P ; R98.2 U51.17 U54.10
|
|
RIB1_N ; U52.3 U53.1
|
|
RIB1_P ; U52.4 U53.2
|
|
RIB2_N ; R95.2 U51.5 U54.1
|
|
RIB2_P ; R94.2 U51.7 U54.2
|
|
RIB3_N ; U51.3 U54.3
|
|
RIB3_P ; U51.4 U54.4
|
|
RIB4_N ; R91.2 U52.12 U53.3
|
|
RIB4_P ; R90.2 U52.13 U53.4
|
|
RIB5_N ; U52.8 U53.5
|
|
RIB5_P ; U52.9 U53.6
|
|
RIB6_N ; R97.2 U51.12 U54.5
|
|
RIB6_P ; R96.2 U51.13 U54.6
|
|
RIB7_N ; U51.8 U54.7
|
|
RIB7_P ; U51.9 U54.8
|
|
RIB8_N ; R93.2 U52.15 U53.7
|
|
RIB8_P ; R92.2 U52.17 U53.8
|
|
RIB9_N ; U52.18 U53.9
|
|
RIB9_P ; U52.19 U53.10
|
|
SET_RETRIG1 ; R54.2 TP127.1 U40.3 U40.4 U41.7
|
|
SET_RETRIG2 ; R55.2 TP128.1 U40.18 U40.19 U41.15
|
|
SMELLIE_DELAY_BUF_N ; R36.2 U34.3 U35.3
|
|
SMELLIE_DELAY_BUF_P ; R37.2 U34.4 U35.4
|
|
SPKR ; U5.42 U62.2
|
|
SR_CLK ; U1.4 U2.8 U3.2 U5.38 U7.4 U36.4 U37.4 U66.8 U69.5 U97.8 U98.8
|
|
SR_DATA ; U1.5 U2.1 U5.36 U36.5 U66.2 U69.6 U98.1
|
|
SYNC24_2_N ; R14.1 U17.12 U18.8
|
|
SYNC24_2_P ; R15.1 U17.11 U18.9
|
|
SYNC_2_N ; R16.1 U17.9 U18.3
|
|
SYNC_2_P ; R17.1 U17.8 U18.4
|
|
TC ; R166.2 U82.19 U84.5 U85.5 U85.14
|
|
TELLIE_DELAY_BUF_N ; R35.2 U34.8 U35.8
|
|
TELLIE_DELAY_BUF_P ; R34.2 U34.9 U35.9
|
|
TRIG_GATE1_N ; R69.2 U44.13 U45.8
|
|
TRIG_GATE1_P ; R67.2 TP135.1 U44.12 U45.9 U46.8
|
|
TRIG_GATE2_N ; R71.2 U44.15 U45.3
|
|
TRIG_GATE2_P ; R70.2 TP136.1 U44.14 U45.4 U46.14
|
|
TRIG_PULS1_N ; R64.2 U43.26 U46.4
|
|
TRIG_PULS1_P ; R65.2 R68.2 U43.25 U46.3
|
|
TRIG_PULS2_N ; R62.2 U43.24 U46.18
|
|
TRIG_PULS2_P ; R63.2 R66.2 U43.23 U46.19
|
|
UNNAMED_1_74F06_I2_D1 ; U62.13 U63.1 U63.3 U63.5 U63.9 U63.11 U63.13 U64.1 ,
|
|
U64.3 U64.5 U64.9 U64.11 U64.13
|
|
UNNAMED_1_74F06_I2_Q1 ; C100.1 R110.1 R111.2 U63.2 U63.4 U63.6 U63.8 U63.10 ,
|
|
U63.12
|
|
UNNAMED_1_74F06_I3_Q1 ; C99.1 R112.1 R113.2 U64.2 U64.4 U64.6 U64.8 U64.10 ,
|
|
U64.12
|
|
UNNAMED_1_74F07_I41_A0 ; U99.19 U101.1
|
|
UNNAMED_1_74F07_I41_A1 ; U99.18 U101.3
|
|
UNNAMED_1_74F07_I41_A2 ; U99.17 U101.5
|
|
UNNAMED_1_74F07_I41_A3 ; U99.16 U101.9
|
|
UNNAMED_1_74F07_I41_Y0 ; R186.1 U101.2
|
|
UNNAMED_1_74F07_I41_Y1 ; R184.1 U101.4
|
|
UNNAMED_1_74F07_I41_Y2 ; R183.1 U101.6
|
|
UNNAMED_1_74F07_I41_Y3 ; R185.1 U101.8
|
|
UNNAMED_1_74F164_I1_GND ; C1.1 U2.7
|
|
UNNAMED_1_74F164_I1_VCC ; C1.2 U2.14
|
|
UNNAMED_1_74F164_I47_Q0 ; U98.3 U99.2
|
|
UNNAMED_1_74F164_I47_Q1 ; U98.4 U99.3
|
|
UNNAMED_1_74F164_I47_Q2 ; U98.5 U99.4
|
|
UNNAMED_1_74F164_I47_Q3 ; U98.6 U99.5
|
|
UNNAMED_1_74F164_I47_Q7 ; U97.1 U98.13
|
|
UNNAMED_1_74F164_I49_Q0 ; U97.3 U100.2
|
|
UNNAMED_1_74F164_I49_Q1 ; U97.4 U100.3
|
|
UNNAMED_1_74F164_I49_Q2 ; U97.5 U100.4
|
|
UNNAMED_1_74F164_I49_Q3 ; U97.6 U100.5
|
|
UNNAMED_1_74F164_I49_Q4 ; U97.10 U100.6
|
|
UNNAMED_1_74F164_I49_Q5 ; U97.11 U100.7
|
|
UNNAMED_1_74F164_I49_Q6 ; U97.12 U100.8
|
|
UNNAMED_1_74F164_I49_Q7 ; U97.13 U100.9
|
|
UNNAMED_1_74F164_I4_Q0 ; U66.3 U68.7
|
|
UNNAMED_1_74F164_I4_Q1 ; U66.4 U68.9
|
|
UNNAMED_1_74F164_I4_Q2 ; U66.5 U68.13
|
|
UNNAMED_1_74F164_I4_Q3 ; U66.6 U68.14
|
|
UNNAMED_1_74F164_I4_Q4 ; U66.10 U67.7
|
|
UNNAMED_1_74F164_I4_Q5 ; U66.11 U67.9
|
|
UNNAMED_1_74F164_I4_Q6 ; U66.12 U67.13
|
|
UNNAMED_1_74F164_I4_Q7 ; U66.13 U67.14
|
|
UNNAMED_1_7815SL_I15_INPUT ; C71.2 L4.2 Q2.1
|
|
UNNAMED_1_7915L_I16_INPUT ; C72.2 L3.2 Q1.2
|
|
UNNAMED_1_AD7243_I2_REFIN ; U69.1 U69.2 U69.13
|
|
UNNAMED_1_AD7243_I2_VDD ; C107.2 U69.16
|
|
UNNAMED_1_AD7243_I2_VSS ; C106.2 U69.15
|
|
UNNAMED_1_AD8009_I1_IN ; R86.2 R87.1 U50.2
|
|
UNNAMED_1_AD8009_I1_V ; C84.1 U50.7
|
|
UNNAMED_1_AD8009_I1_V_1 ; C85.2 U50.4
|
|
UNNAMED_1_AD96687_I1_LE1 ; R356.2 U70.4
|
|
UNNAMED_1_AD96687_I1_LE2 ; R357.2 U70.13
|
|
UNNAMED_1_AD96687_I1_Q1 ; R48.2 TP32.1 U39.5 U70.1
|
|
UNNAMED_1_AD96687_I1_Q2 ; R45.2 TP35.1 U39.13 U70.16
|
|
UNNAMED_1_AD96687_I1_Q1_1 ; R46.2 TP33.1 U39.8 U70.2
|
|
UNNAMED_1_AD96687_I1_Q2_1 ; R43.2 TP34.1 U39.15 U70.15
|
|
UNNAMED_1_CAENBUFFER_I18_CNTRL ; R200.1 U100.15
|
|
UNNAMED_1_CAENBUFFER_I18_INANAL ; R193.1 R194.1 R197.1 U102.6
|
|
UNNAMED_1_CAENBUFFER_I18_VREF5M ; C141.1 C146.1 C151.1 C156.1 C161.1 C166.1 ,
|
|
C171.1 C176.1 R201.1 R218.1 R235.1 R252.1 R269.1 R286.1 R303.1 ,
|
|
R320.1 R355.2 U147.6
|
|
UNNAMED_1_CAENBUFFER_I19_CNTRL ; R217.1 U100.19
|
|
UNNAMED_1_CAENBUFFER_I19_INANAL ; R210.1 R211.1 R214.1 U104.6
|
|
UNNAMED_1_CAENBUFFER_I20_CNTRL ; R234.1 U100.17
|
|
UNNAMED_1_CAENBUFFER_I20_INANAL ; R227.1 R228.1 R231.1 U103.6
|
|
UNNAMED_1_CAENBUFFER_I21_CNTRL ; R251.1 U100.16
|
|
UNNAMED_1_CAENBUFFER_I22_CNTRL ; R268.1 U100.14
|
|
UNNAMED_1_CAENBUFFER_I23_CNTRL ; R285.1 U100.12
|
|
UNNAMED_1_CAENBUFFER_I24_CNTRL ; R302.1 U100.18
|
|
UNNAMED_1_CAENBUFFER_I5_CNTRL ; R319.1 U100.13
|
|
UNNAMED_1_CAENBUFFER_I5_INANAL ; R312.1 R313.1 R316.1 U105.6
|
|
UNNAMED_1_CAENCOMS_I8_DATARDY ; U65.17 U99.11 U100.11
|
|
UNNAMED_1_CAENCOMS_I8_GT2P ; R56.2 U17.20 U32.7 U41.5 U41.17 U42.5 U42.17 ,
|
|
U73.5
|
|
UNNAMED_1_CAENCOMS_I8_GTTTL ; U1.1 U5.24 U7.1 U18.15
|
|
UNNAMED_1_CAENCOMS_I8_SYNC24TTL ; U5.18 U18.7 U20.3
|
|
UNNAMED_1_CAENCOMS_I8_SYNCTTL ; U5.20 U18.5 U20.2
|
|
UNNAMED_1_CHANGECLKS_I3_BCKPCLK ; R339.2 U23.4 U83.18
|
|
UNNAMED_1_CHANGECLKS_I3_BCKPC_1 ; R340.2 U23.3 U83.17
|
|
UNNAMED_1_CHANGECLKS_I3_BCKPC_2 ; R348.2 U25.4 U83.21
|
|
UNNAMED_1_CHANGECLKS_I3_BCKPC_3 ; R346.2 U25.1 U83.20
|
|
UNNAMED_1_CHANGECLKS_I3_CHANGEC ; R334.2 U21.4 U21.5 U21.28 U85.18
|
|
UNNAMED_1_CHANGECLKS_I3_CHANG_1 ; R333.2 U21.3 U21.6 U21.27 U85.19
|
|
UNNAMED_1_CHANGECLKS_I3_DEFAULT ; R342.1 U22.2 U83.15
|
|
UNNAMED_1_CHANGECLKS_I3_DEFAU_1 ; R344.1 U22.1 U83.14
|
|
UNNAMED_1_CLOCKS_I2_BCKPUSED ; U24.5 U65.43
|
|
UNNAMED_1_CLOCKS_I2_CLK100TTL ; U24.7 U65.41
|
|
UNNAMED_1_CLOCKS_I2_CLKSEL ; U4.19 U29.7
|
|
UNNAMED_1_CLOCKS_I2_DATARDY ; U65.25 U94.9
|
|
UNNAMED_1_CLOCKS_I2_RESET ; U65.47 U152.1
|
|
UNNAMED_1_CNTRLREGISTER_I10_DAT ; U4.11 U65.36
|
|
UNNAMED_1_CNTRLREGISTER_I10_ECA ; R28.1 U4.17 U31.7
|
|
UNNAMED_1_CNTRLREGISTER_I10_LOS ; R5.2 U4.18 U10.7
|
|
UNNAMED_1_CNTRLREGISTER_I10_REA ; U3.1 U3.15 U65.32
|
|
UNNAMED_1_CNTRLREGISTER_I10_REG ; U3.9 U3.10 U65.30
|
|
UNNAMED_1_COTO2342_I1_CTRLIN ; R319.2 U142.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_1 ; R200.2 U107.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_2 ; R217.2 U112.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_3 ; R234.2 U117.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_4 ; R251.2 U122.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_5 ; R268.2 U127.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_6 ; R285.2 U132.2
|
|
UNNAMED_1_COTO2342_I1_CTRLIN_7 ; R302.2 U137.2
|
|
UNNAMED_1_COTO2342_I1_IN1 ; R325.1 U142.5
|
|
UNNAMED_1_COTO2342_I1_IN2 ; R324.1 U142.8
|
|
UNNAMED_1_COTO2342_I1_IN1_1 ; R206.1 U107.5
|
|
UNNAMED_1_COTO2342_I1_IN1_2 ; R223.1 U112.5
|
|
UNNAMED_1_COTO2342_I1_IN1_3 ; R240.1 U117.5
|
|
UNNAMED_1_COTO2342_I1_IN1_4 ; R257.1 U122.5
|
|
UNNAMED_1_COTO2342_I1_IN1_5 ; R274.1 U127.5
|
|
UNNAMED_1_COTO2342_I1_IN1_6 ; R291.1 U132.5
|
|
UNNAMED_1_COTO2342_I1_IN1_7 ; R308.1 U137.5
|
|
UNNAMED_1_COTO2342_I1_IN2_1 ; R205.1 U107.8
|
|
UNNAMED_1_COTO2342_I1_IN2_2 ; R222.1 U112.8
|
|
UNNAMED_1_COTO2342_I1_IN2_3 ; R239.1 U117.8
|
|
UNNAMED_1_COTO2342_I1_IN2_4 ; R256.1 U122.8
|
|
UNNAMED_1_COTO2342_I1_IN2_5 ; R273.1 U127.8
|
|
UNNAMED_1_COTO2342_I1_IN2_6 ; R290.1 U132.8
|
|
UNNAMED_1_COTO2342_I1_IN2_7 ; R307.1 U137.8
|
|
UNNAMED_1_COTO2342_I1_NC1 ; R322.2 U142.7
|
|
UNNAMED_1_COTO2342_I1_NC2 ; R315.2 R318.2 U142.6
|
|
UNNAMED_1_COTO2342_I1_NC1_1 ; R203.2 U107.7
|
|
UNNAMED_1_COTO2342_I1_NC1_2 ; R220.2 U112.7
|
|
UNNAMED_1_COTO2342_I1_NC1_3 ; R237.2 U117.7
|
|
UNNAMED_1_COTO2342_I1_NC1_4 ; R254.2 U122.7
|
|
UNNAMED_1_COTO2342_I1_NC1_5 ; R271.2 U127.7
|
|
UNNAMED_1_COTO2342_I1_NC1_6 ; R288.2 U132.7
|
|
UNNAMED_1_COTO2342_I1_NC1_7 ; R305.2 U137.7
|
|
UNNAMED_1_COTO2342_I1_NC2_1 ; R196.2 R199.2 U107.6
|
|
UNNAMED_1_COTO2342_I1_NC2_2 ; R213.2 R216.2 U112.6
|
|
UNNAMED_1_COTO2342_I1_NC2_3 ; R230.2 R233.2 U117.6
|
|
UNNAMED_1_COTO2342_I1_NC2_4 ; R247.2 R250.2 U122.6
|
|
UNNAMED_1_COTO2342_I1_NC2_5 ; R264.2 R267.2 U127.6
|
|
UNNAMED_1_COTO2342_I1_NC2_6 ; R281.2 R284.2 U132.6
|
|
UNNAMED_1_COTO2342_I1_NC2_7 ; R298.2 R301.2 U137.6
|
|
UNNAMED_1_COTO2342_I1_NO1 ; R313.2 U142.1
|
|
UNNAMED_1_COTO2342_I1_NO2 ; R314.2 R317.2 U142.4
|
|
UNNAMED_1_COTO2342_I1_NO1_1 ; R194.2 U107.1
|
|
UNNAMED_1_COTO2342_I1_NO1_2 ; R211.2 U112.1
|
|
UNNAMED_1_COTO2342_I1_NO1_3 ; R228.2 U117.1
|
|
UNNAMED_1_COTO2342_I1_NO1_4 ; R245.2 U122.1
|
|
UNNAMED_1_COTO2342_I1_NO1_5 ; R262.2 U127.1
|
|
UNNAMED_1_COTO2342_I1_NO1_6 ; R279.2 U132.1
|
|
UNNAMED_1_COTO2342_I1_NO1_7 ; R296.2 U137.1
|
|
UNNAMED_1_COTO2342_I1_NO2_1 ; R195.2 R198.2 U107.4
|
|
UNNAMED_1_COTO2342_I1_NO2_2 ; R212.2 R215.2 U112.4
|
|
UNNAMED_1_COTO2342_I1_NO2_3 ; R229.2 R232.2 U117.4
|
|
UNNAMED_1_COTO2342_I1_NO2_4 ; R246.2 R249.2 U122.4
|
|
UNNAMED_1_COTO2342_I1_NO2_5 ; R263.2 R266.2 U127.4
|
|
UNNAMED_1_COTO2342_I1_NO2_6 ; R280.2 R283.2 U132.4
|
|
UNNAMED_1_COTO2342_I1_NO2_7 ; R297.2 R300.2 U137.4
|
|
UNNAMED_1_CSMD0603_I10_B_1 ; C41.2 U34.5 U34.12 U34.14
|
|
UNNAMED_1_CSMD0603_I44_A ; C114.1 U75.1
|
|
UNNAMED_1_CSMD0603_I44_B ; C114.2 U75.7 U75.10 U75.13 U75.16 U75.19 U75.22
|
|
UNNAMED_1_CSMD0603_I54_B ; C113.2 U74.2 U74.4 U74.6 U74.26 U74.28
|
|
UNNAMED_1_CSMD0603_I55_A ; C115.1 U75.2 U75.4 U75.6 U75.26 U75.28
|
|
UNNAMED_1_CSMD0805_I10_A ; C21.1 U15.8
|
|
UNNAMED_1_CSMD0805_I11_A ; C20.1 U15.4
|
|
UNNAMED_1_CSMD0805_I13_B ; C51.2 R38.2 U38.7
|
|
UNNAMED_1_CSMD0805_I14_B ; C10.2 R1.2 U9.7
|
|
UNNAMED_1_CSMD0805_I14_B_1 ; C49.2 R39.2 U38.15
|
|
UNNAMED_1_CSMD0805_I15_B ; C8.2 R2.2 U9.15
|
|
UNNAMED_1_CSMD0805_I20_B ; C176.2 R314.1 R315.1
|
|
UNNAMED_1_CSMD0805_I20_B_1 ; C141.2 R195.1 R196.1
|
|
UNNAMED_1_CSMD0805_I20_B_2 ; C146.2 R212.1 R213.1
|
|
UNNAMED_1_CSMD0805_I20_B_3 ; C151.2 R229.1 R230.1
|
|
UNNAMED_1_CSMD0805_I20_B_4 ; C156.2 R246.1 R247.1
|
|
UNNAMED_1_CSMD0805_I20_B_5 ; C161.2 R263.1 R264.1
|
|
UNNAMED_1_CSMD0805_I20_B_6 ; C166.2 R280.1 R281.1
|
|
UNNAMED_1_CSMD0805_I20_B_7 ; C171.2 R297.1 R298.1
|
|
UNNAMED_1_CSMD0805_I21_B_8 ; C100.2 TP22.1
|
|
UNNAMED_1_CSMD0805_I22_B ; C99.2 TP25.1
|
|
UNNAMED_1_CSMD0805_I23_A_8 ; C95.1 U62.14
|
|
UNNAMED_1_CSMD0805_I23_B ; C95.2 U62.15 U149.2
|
|
UNNAMED_1_CSMD0805_I46_B ; C64.2 R72.2 U47.15
|
|
UNNAMED_1_CSMD0805_I57_B ; C65.2 R75.1 U47.7
|
|
UNNAMED_1_CSMD0805_I64_B ; C61.2 U43.2 U43.4 U43.6
|
|
UNNAMED_1_CSMD0805_I6_A ; C17.1 U13.4
|
|
UNNAMED_1_CSMD0805_I70_B ; C59.2 R66.1 U43.5
|
|
UNNAMED_1_CSMD0805_I71_A ; C58.1 R68.1 U43.3
|
|
UNNAMED_1_CSMD0805_I7_A_1 ; C18.1 U13.11
|
|
UNNAMED_1_CSMD0805_I8_A_1 ; C19.1 U14.4
|
|
UNNAMED_1_CSMD0805_I8_B ; C108.2 U150.3
|
|
UNNAMED_1_CSMD0805_I9_B ; C109.2 U150.1
|
|
UNNAMED_1_CSMD0805_I9_B_1 ; C16.2 U14.11
|
|
UNNAMED_1_DEFAULTCLKSEL_I1_BCKP ; R160.2 U30.18 U30.19 U83.5 U83.23 U83.25
|
|
UNNAMED_1_DEFAULTCLKSEL_I1_DEFA ; R161.2 U30.3 U30.4 U83.3 U83.27
|
|
UNNAMED_1_DEFAULTCLKSEL_I1_RESE ; R157.1 U29.18 U82.26 U85.17
|
|
UNNAMED_1_DEFAULTCLKSEL_I1_RE_1 ; U29.9 U29.14 U96.1 U152.3
|
|
UNNAMED_1_DR610F1BUTTON_I24_B1 ; R167.2 U151.2 U151.3 U152.4
|
|
UNNAMED_1_DS102350_I1_Q ; U36.3 U37.5
|
|
UNNAMED_1_DS90LV019_I14_DIN ; U56.7 U58.2
|
|
UNNAMED_1_DS90LV019_I14_ROUT ; U57.9 U58.4
|
|
UNNAMED_1_ELLIECOMS_I9_SMELLIED ; U5.54 U33.7
|
|
UNNAMED_1_ELLIECOMS_I9_SMELLIEP ; U5.17 U35.5
|
|
UNNAMED_1_ELLIECOMS_I9_SMELLI_1 ; U5.48 U33.13
|
|
UNNAMED_1_ELLIECOMS_I9_TELLIEDE ; U5.50 U33.9
|
|
UNNAMED_1_ELLIECOMS_I9_TELLIEPR ; U5.19 U35.7
|
|
UNNAMED_1_ELLIECOMS_I9_TELLIEPU ; U5.44 U33.14
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTT<10>' ; R145.2 U5.61 U76.6
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTT<11>' ; R144.2 U5.69 U76.8
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTT<12>' ; R143.2 U5.81 U77.2
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTT<13>' ; R142.2 U5.75 U77.4
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTT<14>' ; R141.2 U5.73 U77.6
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTT<15>' ; R140.2 U5.83 U77.8
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<0>' ; U65.74 U79.5
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<1>' ; U65.84 U79.7
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<2>' ; U65.82 U79.15
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<3>' ; U65.76 U79.17
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<4>' ; U65.62 U78.5
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<5>' ; U65.70 U78.7
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<6>' ; U65.68 U78.15
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<7>' ; U65.64 U78.17
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<8>' ; R147.2 U5.67 U76.2
|
|
'UNNAMED_1_EXTTRIGS_I70_EXTTR<9>' ; R146.2 U5.63 U76.4
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<0>' ; R328.2 TP143.1 U144.1 U145.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<1>' ; R209.2 TP145.1 U109.1 U110.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<2>' ; R226.2 TP147.1 U114.1 U115.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<3>' ; R243.2 TP149.1 U119.1 U120.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<4>' ; R260.2 TP151.1 U124.1 U125.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<5>' ; R277.2 TP153.1 U129.1 U130.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<6>' ; R294.2 TP155.1 U134.1 U135.2
|
|
'UNNAMED_1_FRONTPORTS_I2_CAEN<7>' ; R311.2 TP157.1 U139.1 U140.2
|
|
UNNAMED_1_FRONTPORTS_I2_CLK100N ; J2.12 U21.17
|
|
UNNAMED_1_FRONTPORTS_I2_CLK100P ; J2.11 U21.18
|
|
UNNAMED_1_FRONTPORTS_I2_DGTN ; TP117.1 U8.5
|
|
UNNAMED_1_FRONTPORTS_I2_DGTP ; TP116.1 U8.3
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTOLV ; R101.2 TP87.1 U55.5
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTONI ; R102.2 TP88.1 U55.27
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTOTT ; R100.2 TP86.1 U55.3
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTO_1 ; TP94.1 U58.11
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTO_2 ; TP93.1 U58.12
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTO_3 ; TP95.1 U60.2
|
|
UNNAMED_1_FRONTPORTS_I2_ECLTO_4 ; TP92.1 U56.5
|
|
'UNNAMED_1_FRONTPORTS_I2_EXT<10>' ; U76.1 U148.21
|
|
'UNNAMED_1_FRONTPORTS_I2_EXT<11>' ; U76.9 U148.23
|
|
'UNNAMED_1_FRONTPORTS_I2_EXT<12>' ; U77.5 U148.25
|
|
'UNNAMED_1_FRONTPORTS_I2_EXT<13>' ; U77.3 U148.27
|
|
'UNNAMED_1_FRONTPORTS_I2_EXT<14>' ; U77.1 U148.29
|
|
'UNNAMED_1_FRONTPORTS_I2_EXT<15>' ; U77.9 U148.31
|
|
UNNAMED_1_FRONTPORTS_I2_EXTPEDI ; R31.2 TP114.1 U32.9
|
|
UNNAMED_1_FRONTPORTS_I2_EXTPEDO ; TP110.1 U32.3 U32.4
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<0>' ; R118.2 U74.5 U148.1
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<1>' ; R117.2 U74.3 U148.3
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<2>' ; R363.2 U74.27 U148.5
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<3>' ; R119.2 U74.25 U148.7
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<4>' ; R121.2 U75.5 U148.9
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<5>' ; R120.2 U75.3 U148.11
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<6>' ; R122.2 U75.27 U148.13
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<7>' ; R123.2 U75.25 U148.15
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<8>' ; U76.5 U148.17
|
|
'UNNAMED_1_FRONTPORTS_I2_EXTT<9>' ; U76.3 U148.19
|
|
UNNAMED_1_FRONTPORTS_I2_GENERIC ; TP64.1 U5.31
|
|
UNNAMED_1_FRONTPORTS_I2_GENER_1 ; J2.6 U37.15 U38.2
|
|
UNNAMED_1_FRONTPORTS_I2_GENER_2 ; J2.8 U36.15 U38.10
|
|
UNNAMED_1_FRONTPORTS_I2_GTN ; R192.2 U17.24 U17.26 U17.28 U80.2
|
|
UNNAMED_1_FRONTPORTS_I2_GTNIM ; R18.1 TP141.1 U19.2
|
|
UNNAMED_1_FRONTPORTS_I2_GTP ; R191.2 U17.23 U17.25 U17.27 U80.1
|
|
UNNAMED_1_FRONTPORTS_I2_LOSTARO ; TP119.1 U11.12
|
|
UNNAMED_1_FRONTPORTS_I2_LOSTA_1 ; TP118.1 U11.11
|
|
UNNAMED_1_FRONTPORTS_I2_LVDSTOE ; TP84.1 U58.9
|
|
UNNAMED_1_FRONTPORTS_I2_LVDST_1 ; TP83.1 U58.10
|
|
UNNAMED_1_FRONTPORTS_I2_LVDST_2 ; TP90.1 U57.2
|
|
UNNAMED_1_FRONTPORTS_I2_MTCAMIM ; J3.6 U43.18
|
|
UNNAMED_1_FRONTPORTS_I2_MTCAM_1 ; J3.5 U43.17
|
|
UNNAMED_1_FRONTPORTS_I2_MTCAM_2 ; J3.2 U70.8
|
|
UNNAMED_1_FRONTPORTS_I2_MTCAM_3 ; J3.8 U43.21
|
|
UNNAMED_1_FRONTPORTS_I2_MTCAM_4 ; J3.7 U43.20
|
|
UNNAMED_1_FRONTPORTS_I2_MTCAM_5 ; J3.4 U70.9
|
|
UNNAMED_1_FRONTPORTS_I2_MTCDLO ; R6.2 TP120.1 U11.3
|
|
UNNAMED_1_FRONTPORTS_I2_NIMTOEC ; TP85.1 U59.1
|
|
UNNAMED_1_FRONTPORTS_I2_NIMTO_1 ; TP91.1 U55.17
|
|
'UNNAMED_1_FRONTPORTS_I2_PUL<10>' ; R278.1 R279.1 R282.1 TP195.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PUL<11>' ; R295.1 R296.1 R299.1 TP197.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<0>' ; TP175.1 U105.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<1>' ; TP177.1 U105.2
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<2>' ; TP179.1 U102.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<3>' ; TP181.1 U102.2
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<4>' ; TP183.1 U104.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<5>' ; TP185.1 U104.2
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<6>' ; TP187.1 U103.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<7>' ; TP189.1 U103.2
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<8>' ; R244.1 R245.1 R248.1 TP191.1
|
|
'UNNAMED_1_FRONTPORTS_I2_PULS<9>' ; R261.1 R262.1 R265.1 TP193.1
|
|
UNNAMED_1_FRONTPORTS_I2_PULSEIN ; R86.1 TP68.1
|
|
UNNAMED_1_FRONTPORTS_I2_PULSE_1 ; R87.2 TP76.1 U50.6
|
|
UNNAMED_1_FRONTPORTS_I2_RIBBONP ; J2.4 R89.2 U52.5
|
|
UNNAMED_1_FRONTPORTS_I2_RIBBO_1 ; J2.3 R88.2 U52.7
|
|
UNNAMED_1_FRONTPORTS_I2_RIBBO_2 ; J2.1 U51.18
|
|
UNNAMED_1_FRONTPORTS_I2_RIBBO_3 ; J2.2 U51.19
|
|
'UNNAMED_1_FRONTPORTS_I2_SCAL<1>' ; J1.14 U4.15
|
|
'UNNAMED_1_FRONTPORTS_I2_SCAL<2>' ; J1.15 U4.14
|
|
'UNNAMED_1_FRONTPORTS_I2_SCAL<3>' ; J1.3 U4.16
|
|
'UNNAMED_1_FRONTPORTS_I2_SCAL<4>' ; J1.16 U65.20
|
|
'UNNAMED_1_FRONTPORTS_I2_SCAL<5>' ; J1.12 U65.26
|
|
'UNNAMED_1_FRONTPORTS_I2_SCAL<6>' ; J1.13 U65.24
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<0>' ; R326.2 TP159.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<1>' ; R207.2 TP161.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<2>' ; R224.2 TP163.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<3>' ; R241.2 TP165.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<4>' ; R258.2 TP167.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<5>' ; R275.2 TP169.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<6>' ; R292.2 TP171.1
|
|
'UNNAMED_1_FRONTPORTS_I2_SCOP<7>' ; R309.2 TP173.1
|
|
UNNAMED_1_FRONTPORTS_I2_SMELLIE ; J3.18 R33.2 U34.7
|
|
UNNAMED_1_FRONTPORTS_I2_SMELL_1 ; J3.16 U33.19
|
|
UNNAMED_1_FRONTPORTS_I2_SMELL_2 ; J3.12 U33.3
|
|
UNNAMED_1_FRONTPORTS_I2_SYNC24L ; TP140.1 U20.5
|
|
UNNAMED_1_FRONTPORTS_I2_SYNC24N ; R190.2 U17.6 U80.9
|
|
UNNAMED_1_FRONTPORTS_I2_SYNC24P ; R189.2 U17.5 U80.10
|
|
UNNAMED_1_FRONTPORTS_I2_SYNC2_1 ; TP139.1 U20.6
|
|
UNNAMED_1_FRONTPORTS_I2_SYNCLVD ; TP138.1 U20.8
|
|
UNNAMED_1_FRONTPORTS_I2_SYNCL_1 ; TP137.1 U20.7
|
|
UNNAMED_1_FRONTPORTS_I2_SYNCN ; R188.2 U17.4 U80.7
|
|
UNNAMED_1_FRONTPORTS_I2_SYNCP ; R187.2 U17.3 U80.8
|
|
UNNAMED_1_FRONTPORTS_I2_TELLIED ; J3.20 R32.2 U34.13
|
|
UNNAMED_1_FRONTPORTS_I2_TELLIEP ; J3.10 U33.2
|
|
UNNAMED_1_FRONTPORTS_I2_TELLI_1 ; J3.14 U33.18
|
|
UNNAMED_1_FRONTPORTS_I2_TTLTOEC ; TP82.1 U57.7
|
|
UNNAMED_1_FRONTPORTS_I2_TTLTO_1 ; TP89.1 U57.3
|
|
UNNAMED_1_FRONTPORTS_I2_TUBCLKI ; J2.9 R349.2 U30.8 U30.15
|
|
UNNAMED_1_FRONTPORTS_I2_TUBIIRT ; TP112.1 U65.18
|
|
UNNAMED_1_GENERALUTILITIES_I4_1 ; U36.1 U65.19
|
|
UNNAMED_1_GENERALUTILITIES_I4_G ; U37.1 U65.23
|
|
UNNAMED_1_GTDELAYS_I1_DDGTN ; R11.2 U8.4 U12.9
|
|
UNNAMED_1_GTDELAYS_I1_DDGTP ; R12.2 TP11.1 U8.2
|
|
UNNAMED_1_HCT123_I22_Q1 ; R41.1 U38.13
|
|
UNNAMED_1_HCT123_I22_Q2 ; R40.1 U38.5
|
|
UNNAMED_1_HCT123_I29_CEXT1 ; C134.2 R180.2 U95.14
|
|
UNNAMED_1_HCT123_I54_Q1 ; R76.1 U47.13
|
|
UNNAMED_1_HCT123_I54_Q2 ; R77.1 U47.5
|
|
UNNAMED_1_HCT123_I9_Q1 ; R4.1 U9.13
|
|
UNNAMED_1_HCT123_I9_Q2 ; R3.1 U9.5
|
|
UNNAMED_1_HCT238_I53_A0 ; U5.49 U61.1
|
|
UNNAMED_1_HCT238_I53_A1 ; U5.53 U61.2
|
|
UNNAMED_1_HCT238_I53_A2 ; U5.55 U61.3
|
|
UNNAMED_1_HCT374_I2_Q6 ; TP9.1 U4.13
|
|
UNNAMED_1_HCT374_I2_Q7 ; TP10.1 U4.12
|
|
UNNAMED_1_INDUCTORL_I3_A ; L1.1 U49.1
|
|
UNNAMED_1_INDUCTORL_I4_A ; L2.1 U49.4
|
|
UNNAMED_1_INDUCTORL_I5_A ; L4.1 U48.1
|
|
UNNAMED_1_INDUCTORL_I6_A ; L3.1 U48.4
|
|
UNNAMED_1_LED1206_I28_A ; LED1.2 R111.1
|
|
UNNAMED_1_LED1206_I29_A ; LED2.2 R113.1
|
|
UNNAMED_1_LEDL_I11_A ; D3.2 R5.1
|
|
UNNAMED_1_LEDL_I12_A ; D10.2 R79.2
|
|
UNNAMED_1_LEDL_I17_A ; D5.2 R41.2
|
|
UNNAMED_1_LEDL_I18_A ; D1.2 R4.2
|
|
UNNAMED_1_LEDL_I18_A_1 ; D6.2 R40.2
|
|
UNNAMED_1_LEDL_I19_A ; D2.2 R3.2
|
|
UNNAMED_1_LEDL_I19_B ; D9.1 R78.1
|
|
UNNAMED_1_LEDL_I25_A ; D14.2 R85.2
|
|
UNNAMED_1_LEDL_I32_A ; D17.2 R181.2
|
|
UNNAMED_1_LEDL_I33_A ; D18.2 R182.2
|
|
UNNAMED_1_LEDL_I3_A ; D4.2 R28.2
|
|
UNNAMED_1_LEDL_I42_B ; D11.1 R82.1
|
|
UNNAMED_1_LEDL_I44_A ; D12.2 R83.1
|
|
UNNAMED_1_LEDL_I46_B ; D13.1 R84.1
|
|
UNNAMED_1_LEDL_I49_A ; D8.2 R77.2
|
|
UNNAMED_1_LEDL_I50_A ; D7.2 R76.2
|
|
UNNAMED_1_LM337TL_I14_REF ; Q3.1 R80.2 R81.1
|
|
UNNAMED_1_LOGEN_I13_DGT2 ; R116.2 U8.19 U73.7
|
|
UNNAMED_1_LOGEN_I13_LOSTAR2 ; R59.2 U11.14 U42.12
|
|
UNNAMED_1_MC10E016_I48_TCLD ; R359.2 U82.28
|
|
UNNAMED_1_MC10E116_I1_D0 ; C123.2 U83.2 U83.4 U83.6 U83.24 U83.26 U83.28
|
|
UNNAMED_1_MC10E116_I1_Q0 ; R164.2 U83.8 U86.13
|
|
UNNAMED_1_MC10E116_I1_Q3 ; R330.2 U17.18 U18.13
|
|
UNNAMED_1_MC10E116_I1_Q0_1 ; R165.2 U83.9 U86.12
|
|
UNNAMED_1_MC10E116_I1_Q3_1 ; R329.2 U17.17 U18.14
|
|
UNNAMED_1_MC10E116_I22_D3 ; R108.2 U55.25 U59.2
|
|
UNNAMED_1_MC10E116_I22_Q0 ; R103.2 U55.8 U56.4
|
|
UNNAMED_1_MC10E116_I22_Q1 ; R104.2 U55.11 U56.9
|
|
UNNAMED_1_MC10E116_I22_Q2 ; R107.2 U55.14 U60.1
|
|
UNNAMED_1_MC10E116_I22_Q0_1 ; R105.2 U55.9 U56.3
|
|
UNNAMED_1_MC10E116_I22_Q1_1 ; R106.2 U55.12 U56.8
|
|
UNNAMED_1_MC10E116_I2_D0 ; C11.2 U11.2 U11.4 U11.6 U11.28
|
|
UNNAMED_1_MC10E116_I2_Q0 ; R8.2 U11.8 U12.7
|
|
UNNAMED_1_MC10E116_I3_Q0 ; R128.1 U74.8 U79.14
|
|
UNNAMED_1_MC10E116_I3_Q1 ; R124.1 U74.12 U79.8
|
|
UNNAMED_1_MC10E116_I3_Q2 ; R139.1 U74.14 U79.4
|
|
UNNAMED_1_MC10E116_I3_Q3 ; R134.1 U74.18 U79.18
|
|
UNNAMED_1_MC10E116_I3_Q0_1 ; R130.1 U74.9 U79.13
|
|
UNNAMED_1_MC10E116_I3_Q1_1 ; R126.1 U74.11 U79.9
|
|
UNNAMED_1_MC10E116_I3_Q2_1 ; R138.1 U74.15 U79.3
|
|
UNNAMED_1_MC10E116_I3_Q3_1 ; R132.1 U74.17 U79.19
|
|
UNNAMED_1_MC10E116_I4_Q0 ; R129.2 U75.9 U78.13
|
|
UNNAMED_1_MC10E116_I4_Q1 ; R133.2 U75.12 U78.8
|
|
UNNAMED_1_MC10E116_I4_Q2 ; R136.2 U75.15 U78.3
|
|
UNNAMED_1_MC10E116_I4_Q3 ; R125.2 U75.17 U78.19
|
|
UNNAMED_1_MC10E116_I4_Q0_1 ; R131.2 U75.8 U78.14
|
|
UNNAMED_1_MC10E116_I4_Q1_1 ; R135.2 U75.11 U78.9
|
|
UNNAMED_1_MC10E116_I4_Q2_1 ; R137.2 U75.14 U78.4
|
|
UNNAMED_1_MC10E116_I4_Q3_1 ; R127.2 U75.18 U78.18
|
|
UNNAMED_1_MC10E116_I63_Q0 ; R73.1 TP131.1 U43.8 U46.5
|
|
UNNAMED_1_MC10E116_I63_Q1 ; R74.1 TP132.1 U43.11 U46.17
|
|
UNNAMED_1_MC10H131_I17_CE1 ; U42.8 U42.14
|
|
UNNAMED_1_MC10H131_I59_CC ; R362.1 U85.12
|
|
UNNAMED_1_MC10H131_I59_D1 ; R360.2 U85.9
|
|
UNNAMED_1_MC10H131_I59_D2 ; R361.2 U85.13
|
|
UNNAMED_1_MC10H131_I62_CC ; R351.1 U46.12
|
|
UNNAMED_1_MC10H131_I62_D1 ; R353.1 U46.9
|
|
UNNAMED_1_MC10H131_I62_D2 ; R352.1 U46.13
|
|
UNNAMED_1_MICROZEDMODULE_I1_MTC ; U5.32 U69.9
|
|
UNNAMED_1_MICROZEDMODULE_I1_M_1 ; U5.30 U45.7 U47.10
|
|
UNNAMED_1_MICROZEDMODULE_I1_M_2 ; U5.26 U45.5 U47.2
|
|
UNNAMED_1_MMBTH81_I9_C ; R19.1 U19.3
|
|
UNNAMED_1_MPSH81_I17_C ; R109.2 U60.3
|
|
UNNAMED_1_OPA277_I2_IN ; R354.2 R355.1 U147.2
|
|
UNNAMED_1_PICKERING113FC_I60_CN ; R183.2 U105.4
|
|
UNNAMED_1_PICKERING113FC_I61_CN ; R184.2 U102.4
|
|
UNNAMED_1_PICKERING113FC_I62_CN ; R185.2 U104.4
|
|
UNNAMED_1_PICKERING113FC_I63_CN ; R186.2 U103.4
|
|
UNNAMED_1_REF02_I1_VOUT ; R354.1 U146.5
|
|
UNNAMED_1_RESL_I10_B ; R320.2 U141.3
|
|
UNNAMED_1_RESL_I10_B_1 ; R201.2 U106.3
|
|
UNNAMED_1_RESL_I10_B_2 ; R218.2 U111.3
|
|
UNNAMED_1_RESL_I10_B_3 ; R235.2 U116.3
|
|
UNNAMED_1_RESL_I10_B_4 ; R252.2 U121.3
|
|
UNNAMED_1_RESL_I10_B_5 ; R269.2 U126.3
|
|
UNNAMED_1_RESL_I10_B_6 ; R286.2 U131.3
|
|
UNNAMED_1_RESL_I10_B_7 ; R303.2 U136.3
|
|
UNNAMED_1_RESL_I11_A ; R316.2 R323.1 U141.2
|
|
UNNAMED_1_RESL_I11_A_1 ; R197.2 R204.1 U106.2
|
|
UNNAMED_1_RESL_I11_A_2 ; R214.2 R221.1 U111.2
|
|
UNNAMED_1_RESL_I11_A_3 ; R231.2 R238.1 U116.2
|
|
UNNAMED_1_RESL_I11_A_4 ; R248.2 R255.1 U121.2
|
|
UNNAMED_1_RESL_I11_A_5 ; R265.2 R272.1 U126.2
|
|
UNNAMED_1_RESL_I11_A_6 ; R282.2 R289.1 U131.2
|
|
UNNAMED_1_RESL_I11_A_7 ; R299.2 R306.1 U136.2
|
|
UNNAMED_1_RESL_I11_B ; R323.2 R326.1 U141.1
|
|
UNNAMED_1_RESL_I11_B_1 ; R204.2 R207.1 U106.1
|
|
UNNAMED_1_RESL_I11_B_2 ; R221.2 R224.1 U111.1
|
|
UNNAMED_1_RESL_I11_B_3 ; R238.2 R241.1 U116.1
|
|
UNNAMED_1_RESL_I11_B_4 ; R255.2 R258.1 U121.1
|
|
UNNAMED_1_RESL_I11_B_5 ; R272.2 R275.1 U126.1
|
|
UNNAMED_1_RESL_I11_B_6 ; R289.2 R292.1 U131.1
|
|
UNNAMED_1_RESL_I11_B_7 ; R306.2 R309.1 U136.1
|
|
UNNAMED_1_RESL_I16_A ; R325.2 R327.1 U143.2
|
|
UNNAMED_1_RESL_I16_A_1 ; R206.2 R208.1 U108.2
|
|
UNNAMED_1_RESL_I16_A_2 ; R223.2 R225.1 U113.2
|
|
UNNAMED_1_RESL_I16_A_3 ; R240.2 R242.1 U118.2
|
|
UNNAMED_1_RESL_I16_A_4 ; R257.2 R259.1 U123.2
|
|
UNNAMED_1_RESL_I16_A_5 ; R274.2 R276.1 U128.2
|
|
UNNAMED_1_RESL_I16_A_6 ; R291.2 R293.1 U133.2
|
|
UNNAMED_1_RESL_I16_A_7 ; R308.2 R310.1 U138.2
|
|
UNNAMED_1_RESL_I16_B ; R327.2 R328.1 U143.1
|
|
UNNAMED_1_RESL_I16_B_1 ; R208.2 R209.1 U108.1
|
|
UNNAMED_1_RESL_I16_B_2 ; R225.2 R226.1 U113.1
|
|
UNNAMED_1_RESL_I16_B_3 ; R242.2 R243.1 U118.1
|
|
UNNAMED_1_RESL_I16_B_4 ; R259.2 R260.1 U123.1
|
|
UNNAMED_1_RESL_I16_B_5 ; R276.2 R277.1 U128.1
|
|
UNNAMED_1_RESL_I16_B_6 ; R293.2 R294.1 U133.1
|
|
UNNAMED_1_RESL_I16_B_7 ; R310.2 R311.1 U138.1
|
|
UNNAMED_1_RESL_I7_A ; R312.2 R321.1 R322.1
|
|
UNNAMED_1_RESL_I7_A_1 ; R193.2 R202.1 R203.1
|
|
UNNAMED_1_RESL_I7_A_2 ; R210.2 R219.1 R220.1
|
|
UNNAMED_1_RESL_I7_A_3 ; R227.2 R236.1 R237.1
|
|
UNNAMED_1_RESL_I7_A_4 ; R244.2 R253.1 R254.1
|
|
UNNAMED_1_RESL_I7_A_5 ; R261.2 R270.1 R271.1
|
|
UNNAMED_1_RESL_I7_A_6 ; R278.2 R287.1 R288.1
|
|
UNNAMED_1_RESL_I7_A_7 ; R295.2 R304.1 R305.1
|
|
UNNAMED_1_RSMD0805_I16_B ; R20.2 U27.19 U28.13
|
|
UNNAMED_1_RSMD0805_I17_B ; R21.2 U27.18 U28.12
|
|
UNNAMED_1_RSMD0805_I18_B ; R324.2 U143.3
|
|
UNNAMED_1_RSMD0805_I18_B_1 ; R205.2 U108.3
|
|
UNNAMED_1_RSMD0805_I18_B_2 ; R222.2 U113.3
|
|
UNNAMED_1_RSMD0805_I18_B_3 ; R239.2 U118.3
|
|
UNNAMED_1_RSMD0805_I18_B_4 ; R256.2 U123.3
|
|
UNNAMED_1_RSMD0805_I18_B_5 ; R273.2 U128.3
|
|
UNNAMED_1_RSMD0805_I18_B_6 ; R290.2 U133.3
|
|
UNNAMED_1_RSMD0805_I18_B_7 ; R307.2 U138.3
|
|
UNNAMED_1_RSMD0805_I31_A ; C75.1 C79.1 R80.1
|
|
UNNAMED_1_RSMD0805_I45_B ; R358.2 U71.1 U71.6 U72.1 U72.6
|
|
UNNAMED_1_RSMD0805_I4_B ; R115.2 TP21.1
|
|
UNNAMED_1_RSMD0805_I5_B ; R114.2 TP24.1
|
|
UNNAMED_1_SS22SDP2_I34_P1 ; R47.2 TP36.1 U39.7 U71.2
|
|
UNNAMED_1_SS22SDP2_I34_P2 ; R350.2 TP37.1 U39.9 U71.5
|
|
UNNAMED_1_SS22SDP2_I34_TA2 ; U71.3 U71.4 U72.3 U72.4
|
|
UNNAMED_1_SS22SDP2_I35_P1 ; R44.2 TP38.1 U39.14 U72.2
|
|
UNNAMED_1_SS22SDP2_I35_P2 ; R42.2 TP39.1 U39.17 U72.5
|
|
USE_BCKP_N ; R337.1 U21.9 U22.4
|
|
USE_BCKP_P ; R335.1 U21.8 U22.3
|
|
USE_DEFAULT_N ; R341.2 U21.12 U23.2
|
|
USE_DEFAULT_P ; R343.2 U21.11 U23.1
|
|
V3P3 ; C31.1 C33.2 C80.2 C81.2 C82.2 C83.1 Q4.2 R85.1 U5.78 U5.79 U5.80 ,
|
|
U26.6 U27.1 U27.11 U27.20 U65.78 U65.79 U65.80
|
|
VBB_TRANS ; C88.2 U55.2 U55.4 U55.6 U55.26 U55.28
|
|
VCC15 ; C78.2 C107.1 C142.2 C144.2 C147.2 C149.2 C152.2 C154.2 C157.2 ,
|
|
C159.2 C162.2 C164.2 C167.2 C169.2 C172.2 C174.2 C177.2 C179.2 ,
|
|
C181.1 Q2.3 R83.2 TP16.1 U106.8 U108.8 U111.8 U113.8 U116.8 U118.8 ,
|
|
U121.8 U123.8 U126.8 U128.8 U131.8 U133.8 U136.8 U138.8 U141.8 ,
|
|
U143.8 U146.2 U147.7
|
|
VCC ; C2.2 C3.1 C4.1 C5.2 C6.2 C9.1 C12.1 C17.2 C19.2 C21.2 C24.2 C25.1 ,
|
|
C30.2 C35.1 C38.1 C40.2 C42.1 C46.2 C47.2 C48.2 C50.1 C62.2 C66.1 ,
|
|
C68.1 C70.1 C74.1 C77.2 C84.2 C91.1 C92.2 C93.2 C96.1 C97.2 C98.2 ,
|
|
C101.2 C102.1 C103.1 C108.1 C111.2 C117.1 C118.1 C121.2 C122.2 ,
|
|
C131.2 C133.2 C135.2 C136.1 C137.2 C138.2 C139.1 C140.1 C182.2 ,
|
|
C183.1 J1.2 L1.2 Q4.3 R1.1 R2.1 R38.1 R39.1 R72.1 R75.2 R79.1 ,
|
|
R110.2 R112.2 R114.1 R115.1 R140.1 R141.1 R142.1 R143.1 R144.1 ,
|
|
R145.1 R146.1 R147.1 R180.1 TP13.1 U1.14 U1.16 U2.9 U3.16 U4.1 ,
|
|
U4.20 U5.57 U5.58 U5.59 U5.60 U7.14 U7.16 U8.12 U9.3 U9.11 U9.16 ,
|
|
U10.12 U18.12 U20.1 U24.12 U29.8 U29.12 U31.8 U31.12 U32.10 U33.8 ,
|
|
U33.12 U35.12 U36.14 U36.16 U37.14 U37.16 U38.3 U38.11 U38.16 ,
|
|
U45.12 U47.16 U56.12 U57.8 U57.12 U58.1 U58.14 U61.4 U61.5 U61.16 ,
|
|
U62.3 U62.16 U63.14 U64.14 U65.57 U65.58 U65.59 U65.60 U66.9 U66.14 ,
|
|
U67.8 U67.12 U68.8 U68.12 U69.3 U69.4 U70.11 U76.14 U77.14 U78.12 ,
|
|
U79.12 U93.12 U94.8 U94.12 U95.16 U96.3 U96.20 U97.9 U97.14 U98.9 ,
|
|
U98.14 U99.20 U100.20 U101.14 U102.3 U103.3 U104.3 U105.3 U107.3 ,
|
|
U112.3 U117.3 U122.3 U127.3 U132.3 U137.3 U142.3 U149.3 U151.1
|
|
VCC15M ; C76.2 C106.1 C143.1 C145.1 C148.1 C150.1 C153.1 C155.1 C158.1 ,
|
|
C160.1 C163.1 C165.1 C168.1 C170.1 C173.1 C175.1 C178.1 C180.1 Q1.3 ,
|
|
R82.2 TP15.1 U106.4 U108.4 U111.4 U113.4 U116.4 U118.4 U121.4 ,
|
|
U123.4 U126.4 U128.4 U131.4 U133.4 U136.4 U138.4 U141.4 U143.4 ,
|
|
U147.4
|
|
VEE ; C7.1 C13.1 C14.2 C15.2 C16.1 C18.2 C20.2 C22.1 C23.1 C26.1 C27.1 ,
|
|
C28.2 C29.2 C32.1 C34.2 C36.2 C37.2 C39.2 C43.1 C44.2 C45.1 C52.2 ,
|
|
C53.2 C54.2 C55.2 C56.2 C57.1 C60.1 C63.1 C67.2 C69.2 C73.2 C75.2 ,
|
|
C85.1 C86.1 C87.1 C89.1 C90.1 C94.2 C104.2 C105.2 C109.1 C110.2 ,
|
|
C112.2 C116.1 C119.1 C120.1 C124.1 C125.1 C126.1 C127.1 C128.1 ,
|
|
C129.2 C130.1 C132.1 L2.2 Q3.2 R19.2 R78.2 R108.1 R109.1 TP14.1 ,
|
|
U8.10 U10.10 U11.1 U12.10 U17.1 U18.10 U21.1 U22.5 U23.5 U24.10 ,
|
|
U27.10 U28.9 U29.10 U30.10 U31.10 U33.10 U34.10 U35.10 U39.10 ,
|
|
U40.10 U41.10 U42.10 U43.1 U44.1 U45.10 U46.10 U51.10 U52.10 U55.1 ,
|
|
U56.10 U57.10 U67.10 U68.10 U70.6 U73.10 U74.1 U78.10 U79.10 U81.5 ,
|
|
U82.1 U83.1 U84.10 U85.10 U86.9 U93.10 U94.10
|
|
VTT ; C79.2 Q3.3 R6.1 R7.1 R8.1 R9.1 R10.1 R11.1 R12.1 R13.2 R14.2 R15.2 ,
|
|
R16.2 R17.2 R20.1 R21.1 R22.1 R23.1 R24.1 R25.1 R26.1 R27.1 R29.1 ,
|
|
R30.1 R31.1 R32.1 R33.1 R34.1 R35.1 R36.1 R37.1 R42.1 R43.1 R44.1 ,
|
|
R45.1 R46.1 R47.1 R48.1 R49.1 R50.1 R51.1 R52.1 R53.1 R54.1 R55.1 ,
|
|
R56.1 R57.1 R58.1 R59.1 R60.1 R61.1 R62.1 R63.1 R64.1 R65.1 R67.1 ,
|
|
R69.1 R70.1 R71.1 R73.2 R74.2 R81.2 R84.2 R88.1 R89.1 R90.1 R91.1 ,
|
|
R92.1 R93.1 R94.1 R95.1 R96.1 R97.1 R98.1 R99.1 R100.1 R101.1 ,
|
|
R102.1 R103.1 R104.1 R105.1 R106.1 R107.1 R116.1 R117.1 R118.1 ,
|
|
R119.1 R120.1 R121.1 R122.1 R123.1 R124.2 R125.1 R126.2 R127.1 ,
|
|
R128.2 R129.1 R130.2 R131.1 R132.2 R133.1 R134.2 R135.1 R136.1 ,
|
|
R137.1 R138.2 R139.2 R148.2 R149.2 R150.2 R151.2 R152.2 R153.2 ,
|
|
R154.2 R155.2 R156.2 R157.2 R158.1 R159.2 R160.1 R161.1 R162.1 ,
|
|
R163.1 R164.1 R165.1 R166.1 R175.1 R176.1 R177.2 R178.2 R179.1 ,
|
|
R187.1 R188.1 R189.1 R190.1 R191.1 R192.1 R329.1 R330.1 R331.1 ,
|
|
R332.1 R333.1 R334.1 R335.2 R336.1 R337.2 R338.1 R339.1 R340.1 ,
|
|
R341.1 R342.2 R343.1 R344.2 R345.1 R346.1 R347.1 R348.1 R349.1 ,
|
|
R350.1 R363.1 TP17.1 U110.1 U115.1 U120.1 U125.1 U130.1 U135.1 ,
|
|
U140.1 U145.1
|
|
$PACKAGES
|
|
$A_PROPERTIES
|
|
REUSE_ID '26'; 'U144'
|
|
REUSE_ID '21'; 'U145'
|
|
REUSE_ID '11'; 'U142'
|
|
REUSE_ID '4'; 'C176'
|
|
REUSE_ID '15'; 'C177'
|
|
REUSE_ID '6'; 'C178'
|
|
REUSE_ID '27'; 'C179'
|
|
REUSE_ID '25'; 'C180'
|
|
REUSE_ID '7'; 'R318'
|
|
REUSE_ID '12'; 'R312'
|
|
ROOM 'CHANGE_CLKS'; 'C30' 'C29' 'C28' 'C27' 'C26' 'R348',
|
|
'R347' 'R346' 'R345' 'R344' 'R343' 'R342',
|
|
'R341' 'R340' 'R339' 'R338' 'R337' 'R336',
|
|
'R335' 'R334' 'R333' 'R332' 'R331' 'U21',
|
|
'U23' 'U22' 'U25' 'U24'
|
|
ROOM 'PULSE_INV'; 'C85' 'C84' 'R87' 'R86' 'U50'
|
|
ROOM 'EXT_TRIG'; 'C122' 'C121' 'C120' 'C119' 'C118' 'C117',
|
|
'C116' 'C115' 'C114' 'C113' 'R139' 'R138',
|
|
'R137' 'R136' 'R135' 'R134' 'R133' 'R132',
|
|
'R131' 'R130' 'R129' 'R128' 'R127' 'R126',
|
|
'R125' 'R124' 'R123' 'R122' 'R121' 'R120',
|
|
'R119' 'R118' 'R117' 'R363' 'U75' 'U74',
|
|
'R147' 'R146' 'R145' 'R144' 'R143' 'R142',
|
|
'R141' 'R140' 'U79' 'U78' 'U77' 'U76'
|
|
ROOM 'FAULT_DETECT'; 'R182' 'R181' 'D18' 'D17' 'C123' 'C136',
|
|
'C135' 'C133' 'C132' 'C131' 'C130' 'C129',
|
|
'C128' 'C127' 'C126' 'C125' 'C124' 'C105',
|
|
'C104' 'C103' 'C102' 'C101' 'U66' 'R179',
|
|
'R178' 'R177' 'R176' 'R175' 'R166' 'R165',
|
|
'R164' 'R163' 'R162' 'R161' 'R160' 'R159',
|
|
'R158' 'R157' 'R156' 'R155' 'R154' 'R153',
|
|
'R152' 'R151' 'R150' 'R149' 'R148' 'U84',
|
|
'U83' 'U86' 'U81' 'U92' 'U91' 'U90',
|
|
'U89' 'U88' 'U87' 'R180' 'U85' 'U93',
|
|
'U94' 'U68' 'U67' 'U82' 'C134' 'U96',
|
|
'U95' 'R362' 'R361' 'R360' 'R359'
|
|
ROOM 'CAEN_ANALOG'; 'R355' 'R354' 'R186' 'R185' 'R184' 'R183',
|
|
'U100' 'U99' 'C140' 'C139' 'C138' 'C137',
|
|
'C181' 'C182' 'U98' 'U97' 'U143' 'U141',
|
|
'U138' 'U136' 'U133' 'U131' 'U128' 'U126',
|
|
'U123' 'U121' 'U118' 'U116' 'U113' 'U111',
|
|
'U108' 'U106' 'R321' 'R304' 'R287' 'R270',
|
|
'R253' 'R236' 'R219' 'R202' 'R312' 'R295',
|
|
'R278' 'R261' 'R244' 'R227' 'R210' 'R193',
|
|
'R318' 'R301' 'R284' 'R267' 'R250' 'R233',
|
|
'R216' 'R199' 'R319' 'R302' 'R285' 'R268',
|
|
'R251' 'R234' 'R217' 'R200' 'R328' 'R326',
|
|
'R325' 'R324' 'R311' 'R309' 'R308' 'R307',
|
|
'R294' 'R292' 'R291' 'R290' 'R277' 'R275',
|
|
'R274' 'R273' 'R260' 'R258' 'R257' 'R256',
|
|
'R243' 'R241' 'R240' 'R239' 'R226' 'R224',
|
|
'R223' 'R222' 'R209' 'R207' 'R206' 'R205',
|
|
'R327' 'R323' 'R322' 'R320' 'R317' 'R316',
|
|
'R315' 'R314' 'R313' 'R310' 'R306' 'R305',
|
|
'R303' 'R300' 'R299' 'R298' 'R297' 'R296',
|
|
'R293' 'R289' 'R288' 'R286' 'R283' 'R282',
|
|
'R281' 'R280' 'R279' 'R276' 'R272' 'R271',
|
|
'R269' 'R266' 'R265' 'R264' 'R263' 'R262',
|
|
'R259' 'R255' 'R254' 'R252' 'R249' 'R248',
|
|
'R247' 'R246' 'R245' 'R242' 'R238' 'R237',
|
|
'R235' 'R232' 'R231' 'R230' 'R229' 'R228',
|
|
'R225' 'R221' 'R220' 'R218' 'R215' 'R214',
|
|
'R213' 'R212' 'R211' 'R208' 'R204' 'R203',
|
|
'R201' 'R198' 'R197' 'R196' 'R195' 'R194',
|
|
'C180' 'C179' 'C178' 'C177' 'C176' 'C175',
|
|
'C174' 'C173' 'C172' 'C171' 'C170' 'C169',
|
|
'C168' 'C167' 'C166' 'C165' 'C164' 'C163',
|
|
'C162' 'C161' 'C160' 'C159' 'C158' 'C157',
|
|
'C156' 'C155' 'C154' 'C153' 'C152' 'C151',
|
|
'C150' 'C149' 'C148' 'C147' 'C146' 'C145',
|
|
'C144' 'C143' 'C142' 'C141' 'U142' 'U137',
|
|
'U132' 'U127' 'U122' 'U117' 'U112' 'U107',
|
|
'U101' 'U145' 'U144' 'U140' 'U139' 'U135',
|
|
'U134' 'U130' 'U129' 'U125' 'U124' 'U120',
|
|
'U119' 'U115' 'U114' 'U110' 'U109' 'U146',
|
|
'U147' 'U105' 'U104' 'U103' 'U102'
|
|
ROOM 'GT_DELAY'; 'R2' 'R1' 'R4' 'R3' 'D2' 'D1',
|
|
'U7' 'U1' 'C10' 'C8' 'C9' 'C7',
|
|
'C6' 'C5' 'C4' 'U8' 'U9'
|
|
ROOM 'POWER'; 'TP17' 'TP16' 'TP15' 'TP14' 'TP13' 'C78',
|
|
'C76' 'C81' 'C79' 'C75' 'C70' 'C69',
|
|
'C80' 'C77' 'C68' 'C67' 'C82' 'C74',
|
|
'C73' 'R80' 'R81' 'R78' 'U49' 'U48',
|
|
'Q3' 'Q4' 'L4' 'L3' 'L2' 'L1',
|
|
'C83' 'C72' 'C71' 'Q1' 'Q2'
|
|
ROOM 'CNTRL_REG'; 'TP10' 'TP9' 'TP8' 'TP7' 'TP6' 'TP5',
|
|
'TP4' 'TP3' 'TP2' 'TP1' 'U4' 'C3',
|
|
'C2' 'C1' 'U3' 'U2'
|
|
PLACE_TAG; 'TP10' 'TP9' 'TP8' 'TP7' 'TP6' 'TP5',
|
|
'TP4' 'TP3' 'TP2' 'TP1' 'TP198' 'TP197',
|
|
'TP196' 'TP195' 'TP194' 'TP193' 'TP192' 'TP191',
|
|
'TP190' 'TP189' 'TP188' 'TP187' 'TP186' 'TP185',
|
|
'TP184' 'TP183' 'TP182' 'TP181' 'TP180' 'TP179',
|
|
'TP178' 'TP177' 'TP176' 'TP175' 'TP174' 'TP173',
|
|
'TP172' 'TP171' 'TP170' 'TP169' 'TP168' 'TP167',
|
|
'TP166' 'TP165' 'TP164' 'TP163' 'TP162' 'TP161',
|
|
'TP160' 'TP159' 'TP158' 'TP157' 'TP156' 'TP155',
|
|
'TP154' 'TP153' 'TP152' 'TP151' 'TP150' 'TP149',
|
|
'TP148' 'TP147' 'TP146' 'TP145' 'TP144' 'TP143',
|
|
'TP130' 'TP129' 'TP127' 'TP26' 'TP25' 'TP24',
|
|
'TP23' 'TP22' 'TP21' 'TP17' 'TP16' 'TP15',
|
|
'TP14' 'TP13' 'TP12' 'R2' 'R1' 'R75',
|
|
'R72' 'R39' 'R38' 'R4' 'R3' 'R5',
|
|
'R186' 'R185' 'R184' 'R183' 'R182' 'R181',
|
|
'R77' 'R76' 'R41' 'R40' 'R28' 'D2',
|
|
'D1' 'D3' 'D18' 'D17' 'D14' 'D13',
|
|
'D12' 'D11' 'D10' 'D9' 'D8' 'D7',
|
|
'D6' 'D5' 'D4' 'U4' 'U100' 'U99',
|
|
'U7' 'U1' 'C10' 'C8' 'C140' 'C139',
|
|
'C138' 'C137' 'C123' 'C100' 'C99' 'C94',
|
|
'C93' 'C92' 'C91' 'C90' 'C88' 'C78',
|
|
'C76' 'C65' 'C64' 'C61' 'C59' 'C58',
|
|
'C51' 'C49' 'C9' 'C7' 'C6' 'C5',
|
|
'C4' 'C50' 'C3' 'C2' 'C1' 'C15',
|
|
'C14' 'C13' 'C12' 'C11' 'C136' 'C135',
|
|
'C133' 'C132' 'C131' 'C130' 'C129' 'C128',
|
|
'C127' 'C126' 'C125' 'C124' 'C122' 'C121',
|
|
'C120' 'C119' 'C118' 'C117' 'C116' 'C115',
|
|
'C114' 'C113' 'C105' 'C104' 'C103' 'C102',
|
|
'C101' 'C89' 'C87' 'C86' 'C85' 'C84',
|
|
'C48' 'C47' 'C46' 'C45' 'C44' 'C43',
|
|
'C42' 'C41' 'C40' 'C39' 'C38' 'C37',
|
|
'C36' 'C35' 'C34' 'C33' 'C32' 'C30',
|
|
'C29' 'C28' 'C27' 'C26' 'C25' 'C24',
|
|
'C23' 'C22' 'U3' 'U2' 'U98' 'U97',
|
|
'R11' 'R10' 'R9' 'R8' 'R7' 'R6',
|
|
'R192' 'R191' 'R190' 'R189' 'R188' 'R187',
|
|
'R179' 'R178' 'R177' 'R176' 'R175' 'R166',
|
|
'R165' 'R164' 'R163' 'R162' 'R161' 'R160',
|
|
'R159' 'R158' 'R157' 'R156' 'R155' 'R154',
|
|
'R153' 'R152' 'R151' 'R150' 'R149' 'R148',
|
|
'R139' 'R138' 'R137' 'R136' 'R135' 'R134',
|
|
'R133' 'R132' 'R131' 'R130' 'R129' 'R128',
|
|
'R127' 'R126' 'R125' 'R124' 'R123' 'R122',
|
|
'R121' 'R120' 'R119' 'R118' 'R117' 'R107',
|
|
'R106' 'R105' 'R104' 'R103' 'R102' 'R101',
|
|
'R100' 'R99' 'R98' 'R97' 'R96' 'R95',
|
|
'R94' 'R93' 'R92' 'R91' 'R90' 'R89',
|
|
'R88' 'R74' 'R73' 'R71' 'R70' 'R69',
|
|
'R67' 'R65' 'R64' 'R63' 'R62' 'R61',
|
|
'R60' 'R59' 'R58' 'R57' 'R56' 'R55',
|
|
'R54' 'R53' 'R52' 'R51' 'R50' 'R49',
|
|
'R48' 'R47' 'R46' 'R45' 'R44' 'R43',
|
|
'R42' 'R37' 'R36' 'R35' 'R34' 'R33',
|
|
'R32' 'R31' 'R30' 'R29' 'R27' 'R26',
|
|
'R25' 'R24' 'R23' 'R22' 'R21' 'R20',
|
|
'R17' 'R16' 'R15' 'R14' 'R13' 'R330',
|
|
'R329' 'R348' 'R347' 'R346' 'R345' 'R344',
|
|
'R343' 'R342' 'R341' 'R340' 'R339' 'R338',
|
|
'R337' 'R336' 'R335' 'R334' 'R333' 'R332',
|
|
'R331' 'R350' 'U12' 'U84' 'U40' 'U39',
|
|
'U32' 'U30' 'U11' 'U83' 'U75' 'U74',
|
|
'U55' 'U43' 'U21' 'U17' 'U143' 'U141',
|
|
'U138' 'U136' 'U133' 'U131' 'U128' 'U126',
|
|
'U123' 'U121' 'U118' 'U116' 'U113' 'U111',
|
|
'U108' 'U106' 'C81' 'C79' 'C75' 'C70',
|
|
'C69' 'C80' 'C77' 'C68' 'C67' 'C82',
|
|
'C74' 'C73' 'U27' 'U86' 'U28' 'U81',
|
|
'U23' 'U22' 'U25' 'U92' 'U91' 'U90',
|
|
'U89' 'U88' 'U87' 'R80' 'R321' 'R304',
|
|
'R287' 'R270' 'R253' 'R236' 'R219' 'R202',
|
|
'R147' 'R146' 'R145' 'R144' 'R143' 'R142',
|
|
'R141' 'R140' 'R312' 'R295' 'R278' 'R261',
|
|
'R244' 'R227' 'R210' 'R193' 'R180' 'R81',
|
|
'R318' 'R301' 'R284' 'R267' 'R250' 'R233',
|
|
'R216' 'R199' 'R115' 'R114' 'R113' 'R112',
|
|
'R111' 'R110' 'R109' 'R108' 'R87' 'R86',
|
|
'R85' 'R84' 'R83' 'R82' 'R79' 'R78',
|
|
'R68' 'R66' 'R19' 'R18' 'R319' 'R302',
|
|
'R285' 'R268' 'R251' 'R234' 'R217' 'R200',
|
|
'R328' 'R326' 'R325' 'R324' 'R311' 'R309',
|
|
'R308' 'R307' 'R294' 'R292' 'R291' 'R290',
|
|
'R277' 'R275' 'R274' 'R273' 'R260' 'R258',
|
|
'R257' 'R256' 'R243' 'R241' 'R240' 'R239',
|
|
'R226' 'R224' 'R223' 'R222' 'R209' 'R207',
|
|
'R206' 'R205' 'R327' 'R323' 'R322' 'R320',
|
|
'R317' 'R316' 'R315' 'R314' 'R313' 'R310',
|
|
'R306' 'R305' 'R303' 'R300' 'R299' 'R298',
|
|
'R297' 'R296' 'R293' 'R289' 'R288' 'R286',
|
|
'R283' 'R282' 'R281' 'R280' 'R279' 'R276',
|
|
'R272' 'R271' 'R269' 'R266' 'R265' 'R264',
|
|
'R263' 'R262' 'R259' 'R255' 'R254' 'R252',
|
|
'R249' 'R248' 'R247' 'R246' 'R245' 'R242',
|
|
'R238' 'R237' 'R235' 'R232' 'R231' 'R230',
|
|
'R229' 'R228' 'R225' 'R221' 'R220' 'R218',
|
|
'R215' 'R214' 'R213' 'R212' 'R211' 'R208',
|
|
'R204' 'R203' 'R201' 'R198' 'R197' 'R196',
|
|
'R195' 'R194' 'U49' 'U48' 'U14' 'U13',
|
|
'U15' 'U60' 'U19' 'U59' 'U85' 'U46',
|
|
'U42' 'U41' 'U93' 'U79' 'U78' 'U56',
|
|
'U45' 'U35' 'U24' 'U18' 'U94' 'U57',
|
|
'U33' 'U31' 'U29' 'U10' 'U8' 'U52',
|
|
'U51' 'U34' 'U44' 'U82' 'Q3' 'Q4',
|
|
'L4' 'L3' 'L2' 'L1' 'U54' 'U53',
|
|
'U16' 'U6' 'U20' 'U58' 'U37' 'U36',
|
|
'C180' 'C179' 'C178' 'C177' 'C176' 'C175',
|
|
'C174' 'C173' 'C172' 'C171' 'C170' 'C169',
|
|
'C168' 'C167' 'C166' 'C165' 'C164' 'C163',
|
|
'C162' 'C161' 'C160' 'C159' 'C158' 'C157',
|
|
'C156' 'C155' 'C154' 'C153' 'C152' 'C151',
|
|
'C150' 'C149' 'C148' 'C147' 'C146' 'C145',
|
|
'C144' 'C143' 'C142' 'C141' 'C134' 'C83',
|
|
'C95' 'C21' 'C20' 'C19' 'C18' 'C17',
|
|
'C16' 'C72' 'C71' 'C98' 'C97' 'C96',
|
|
'C66' 'C63' 'C62' 'C60' 'C57' 'C56',
|
|
'C55' 'C54' 'C53' 'C52' 'U142' 'U137',
|
|
'U132' 'U127' 'U122' 'U117' 'U112' 'U107',
|
|
'U50' 'Q1' 'Q2' 'U96' 'U101' 'U77',
|
|
'U76' 'U64' 'U63' 'U145' 'U144' 'U140',
|
|
'U139' 'U135' 'U134' 'U130' 'U129' 'U125',
|
|
'U124' 'U120' 'U119' 'U115' 'U114' 'U110',
|
|
'U109' 'U95' 'U62' 'U47' 'U38' 'U9',
|
|
'U26' 'C31' 'R353' 'R352' 'R351' 'R362',
|
|
'R361' 'R360' 'R359' 'U105' 'U104' 'U103',
|
|
'U102'
|
|
ROOM 'MTCA_MIMIC'; 'TP136' 'TP135' 'TP130' 'TP129' 'TP127' 'TP35',
|
|
'TP34' 'R75' 'R72' 'R77' 'R76' 'D8',
|
|
'D7' 'C65' 'C64' 'C61' 'C59' 'C58',
|
|
'R74' 'R73' 'R71' 'R70' 'R69' 'R67',
|
|
'R65' 'R64' 'R63' 'R62' 'R61' 'R60',
|
|
'R59' 'R58' 'R57' 'R56' 'R55' 'R54',
|
|
'R53' 'R52' 'R51' 'R50' 'R49' 'R48',
|
|
'R47' 'R46' 'R45' 'R44' 'R43' 'R42',
|
|
'R350' 'U40' 'U39' 'U43' 'R68' 'R66',
|
|
'U46' 'U42' 'U41' 'U45' 'U44' 'C66',
|
|
'C63' 'C62' 'C60' 'C57' 'C56' 'C55',
|
|
'C54' 'C53' 'C52' 'U47' 'R353' 'R352',
|
|
'R351'
|
|
ROOM 'CLK_PICK'; 'TP12' 'C37' 'C36' 'C35' 'C34' 'C33',
|
|
'C32' 'R27' 'R26' 'R25' 'R24' 'R23',
|
|
'R22' 'R21' 'R20' 'R349' 'U30' 'U27',
|
|
'U28' 'R167' 'U29' 'U26' 'C31' 'U152'
|
|
ROOM 'GENERIC_DELAYS'; 'R39' 'R38' 'R41' 'R40' 'D6' 'D5',
|
|
'C51' 'C49' 'C50' 'C48' 'C47' 'U37',
|
|
'U36' 'U38'
|
|
ROOM 'SEL_LO'; 'R5' 'D3' 'C15' 'C14' 'C13' 'C12',
|
|
'C11' 'R11' 'R10' 'R9' 'R8' 'R7',
|
|
'R6' 'U12' 'U11' 'U10'
|
|
ROOM 'ECAL_CONTROL'; 'R28' 'D4' 'C40' 'C39' 'C38' 'R31',
|
|
'R30' 'R29' 'U32' 'U31'
|
|
ROOM 'SPKR'; 'C100' 'C99' 'R113' 'R112' 'R111' 'R110',
|
|
'C95' 'C98' 'C97' 'C96' 'U64' 'U63',
|
|
'U62' 'LED2' 'LED1' 'U149'
|
|
ROOM 'TRANSLATORS'; 'C94' 'C93' 'C92' 'C91' 'C90' 'C88',
|
|
'C89' 'R107' 'R106' 'R105' 'R104' 'R103',
|
|
'R102' 'R101' 'R100' 'U55' 'R109' 'R108',
|
|
'U60' 'U59' 'U56' 'U57' 'U58'
|
|
ROOM 'RIBBON_DELAY'; 'C87' 'C86' 'R99' 'R98' 'R97' 'R96',
|
|
'R95' 'R94' 'R93' 'R92' 'R91' 'R90',
|
|
'R89' 'R88' 'U52' 'U51' 'U54' 'U53'
|
|
ROOM 'ELLIE'; 'C46' 'C45' 'C44' 'C43' 'C42' 'C41',
|
|
'R37' 'R36' 'R35' 'R34' 'R33' 'R32',
|
|
'U35' 'U33' 'U34'
|
|
ROOM 'CAEN_DIG'; 'C25' 'C24' 'C23' 'C22' 'R192' 'R191',
|
|
'R190' 'R189' 'R188' 'R187' 'R17' 'R16',
|
|
'R15' 'R14' 'R13' 'R330' 'R329' 'U17',
|
|
'R19' 'R18' 'U19' 'U18' 'U20'
|
|
REUSE_ID '23'; 'U143'
|
|
REUSE_ID '14'; 'U141'
|
|
REUSE_ID '20'; 'R321'
|
|
REUSE_ID '1'; 'R319'
|
|
REUSE_ID '22'; 'R328'
|
|
REUSE_ID '19'; 'R326'
|
|
REUSE_ID '18'; 'R325'
|
|
REUSE_ID '16'; 'R324'
|
|
REUSE_ID '24'; 'R327'
|
|
REUSE_ID '10'; 'R323'
|
|
REUSE_ID '17'; 'R322'
|
|
REUSE_ID '9'; 'R320'
|
|
REUSE_ID '2'; 'R317'
|
|
REUSE_ID '8'; 'R316'
|
|
REUSE_ID '5'; 'R315'
|
|
REUSE_ID '3'; 'R314'
|
|
REUSE_ID '13'; 'R313'
|
|
ROOM 'BASE_BUFFER'; 'U14' 'U13' 'U15' 'U16' 'U6' 'C21',
|
|
'C20' 'C19' 'C18' 'C17' 'C16'
|
|
$NETS
|
|
$A_PROPERTIES
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_dr610f1button_i24_b1'; 'UNNAMED_1_DR610F1BUTTON_I24_B1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_defaultclksel_i1_reset'; 'UNNAMED_1_DEFAULTCLKSEL_I1_RE_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_microzedmodule_i1_mtcamimictrig2'; 'UNNAMED_1_MICROZEDMODULE_I1_M_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_microzedmodule_i1_mtcamimictrig1'; 'UNNAMED_1_MICROZEDMODULE_I1_M_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_pickering113fc_i63_cntrl'; 'UNNAMED_1_PICKERING113FC_I63_CN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_pickering113fc_i62_cntrl'; 'UNNAMED_1_PICKERING113FC_I62_CN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_pickering113fc_i61_cntrl'; 'UNNAMED_1_PICKERING113FC_I61_CN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_pickering113fc_i60_cntrl'; 'UNNAMED_1_PICKERING113FC_I60_CN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_led1206_i29_a'; 'UNNAMED_1_LED1206_I29_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_led1206_i28_a'; 'UNNAMED_1_LED1206_I28_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_rsmd0805_i45_b'; 'UNNAMED_1_RSMD0805_I45_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10h131_i59_d2'; 'UNNAMED_1_MC10H131_I59_D2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10h131_i59_d1'; 'UNNAMED_1_MC10H131_I59_D1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10h131_i59_cc'; 'UNNAMED_1_MC10H131_I59_CC'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10e016_i48_tcld'; 'UNNAMED_1_MC10E016_I48_TCLD'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad96687_i1_le2'; 'UNNAMED_1_AD96687_I1_LE2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad96687_i1_le1'; 'UNNAMED_1_AD96687_I1_LE1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i5_cntrl'; 'UNNAMED_1_CAENBUFFER_I5_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i24_cntrl'; 'UNNAMED_1_CAENBUFFER_I24_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i20_cntrl'; 'UNNAMED_1_CAENBUFFER_I20_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i19_cntrl'; 'UNNAMED_1_CAENBUFFER_I19_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i18_cntrl'; 'UNNAMED_1_CAENBUFFER_I18_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i58@tubii_tk2_lib.vref_gen(sch_1):unnamed_1_ref02_i1_vout'; 'UNNAMED_1_REF02_I1_VOUT'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i58@tubii_tk2_lib.vref_gen(sch_1):unnamed_1_opa277_i2_in'; 'UNNAMED_1_OPA277_I2_IN'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i18_vref5m'; 'UNNAMED_1_CAENBUFFER_I18_VREF5M'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_mc10h131_i62_d2'; 'UNNAMED_1_MC10H131_I62_D2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_mc10h131_i62_d1'; 'UNNAMED_1_MC10H131_I62_D1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_mc10h131_i62_cc'; 'UNNAMED_1_MC10H131_I62_CC'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):vbb_trans'; 'VBB_TRANS'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):vcc15m'; 'VCC15M'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):vcc15'; 'VCC15'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):v3p3'; 'V3P3'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):use_default_p'; 'USE_DEFAULT_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):use_default_n'; 'USE_DEFAULT_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):use_bckp_p'; 'USE_BCKP_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):use_bckp_n'; 'USE_BCKP_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ss22sdp2_i35_p2'; 'UNNAMED_1_SS22SDP2_I35_P2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ss22sdp2_i35_p1'; 'UNNAMED_1_SS22SDP2_I35_P1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ss22sdp2_i34_ta2'; 'UNNAMED_1_SS22SDP2_I34_TA2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ss22sdp2_i34_p2'; 'UNNAMED_1_SS22SDP2_I34_P2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ss22sdp2_i34_p1'; 'UNNAMED_1_SS22SDP2_I34_P1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_rsmd0805_i5_b'; 'UNNAMED_1_RSMD0805_I5_B'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_rsmd0805_i4_b'; 'UNNAMED_1_RSMD0805_I4_B'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_rsmd0805_i31_a'; 'UNNAMED_1_RSMD0805_I31_A'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_rsmd0805_i18_b'; 'UNNAMED_1_RSMD0805_I18_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):unnamed_1_rsmd0805_i17_b'; 'UNNAMED_1_RSMD0805_I17_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):unnamed_1_rsmd0805_i16_b'; 'UNNAMED_1_RSMD0805_I16_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i7_a'; 'UNNAMED_1_RESL_I7_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_b'; 'UNNAMED_1_RESL_I16_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_7'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_6'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_5'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_4'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_3'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i16_a'; 'UNNAMED_1_RESL_I16_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_7'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_6'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_5'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_4'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_3'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_2'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_b'; 'UNNAMED_1_RESL_I11_B'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_7'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_6'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_5'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_2'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i11_a'; 'UNNAMED_1_RESL_I11_A'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_resl_i10_b'; 'UNNAMED_1_RESL_I10_B'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mpsh81_i17_c'; 'UNNAMED_1_MPSH81_I17_C'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):unnamed_1_mmbth81_i9_c'; 'UNNAMED_1_MMBTH81_I9_C'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_microzedmodule_i1_mtcamimicdatardy'; 'UNNAMED_1_MICROZEDMODULE_I1_MTC'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_mc10h131_i17_ce1'; 'UNNAMED_1_MC10H131_I17_CE1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_mc10e116_i63_q1'; 'UNNAMED_1_MC10E116_I63_Q1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_mc10e116_i63_q0'; 'UNNAMED_1_MC10E116_I63_Q0'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q3_1'; 'UNNAMED_1_MC10E116_I4_Q3_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q3'; 'UNNAMED_1_MC10E116_I4_Q3'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q2_1'; 'UNNAMED_1_MC10E116_I4_Q2_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q2'; 'UNNAMED_1_MC10E116_I4_Q2'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q1_1'; 'UNNAMED_1_MC10E116_I4_Q1_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q1'; 'UNNAMED_1_MC10E116_I4_Q1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q0_1'; 'UNNAMED_1_MC10E116_I4_Q0_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i4_q0'; 'UNNAMED_1_MC10E116_I4_Q0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q3_1'; 'UNNAMED_1_MC10E116_I3_Q3_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q3'; 'UNNAMED_1_MC10E116_I3_Q3'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q2_1'; 'UNNAMED_1_MC10E116_I3_Q2_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q2'; 'UNNAMED_1_MC10E116_I3_Q2'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q1_1'; 'UNNAMED_1_MC10E116_I3_Q1_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q1'; 'UNNAMED_1_MC10E116_I3_Q1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q0_1'; 'UNNAMED_1_MC10E116_I3_Q0_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_mc10e116_i3_q0'; 'UNNAMED_1_MC10E116_I3_Q0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mc10e116_i22_q2'; 'UNNAMED_1_MC10E116_I22_Q2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mc10e116_i22_q1_1'; 'UNNAMED_1_MC10E116_I22_Q1_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mc10e116_i22_q1'; 'UNNAMED_1_MC10E116_I22_Q1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mc10e116_i22_q0_1'; 'UNNAMED_1_MC10E116_I22_Q0_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mc10e116_i22_q0'; 'UNNAMED_1_MC10E116_I22_Q0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_mc10e116_i22_d3'; 'UNNAMED_1_MC10E116_I22_D3'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):unnamed_1_mc10e116_i1_q3_1'; 'UNNAMED_1_MC10E116_I1_Q3_1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):unnamed_1_mc10e116_i1_q3'; 'UNNAMED_1_MC10E116_I1_Q3'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10e116_i1_q0_1'; 'UNNAMED_1_MC10E116_I1_Q0_1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10e116_i1_q0'; 'UNNAMED_1_MC10E116_I1_Q0'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_mc10e116_i1_d0'; 'UNNAMED_1_MC10E116_I1_D0'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_logen_i13_lostar2'; 'UNNAMED_1_LOGEN_I13_LOSTAR2'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_logen_i13_dgt2'; 'UNNAMED_1_LOGEN_I13_DGT2'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_lm337tl_i14_ref'; 'UNNAMED_1_LM337TL_I14_REF'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_ledl_i50_a'; 'UNNAMED_1_LEDL_I50_A'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_ledl_i49_a'; 'UNNAMED_1_LEDL_I49_A'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_ledl_i46_b'; 'UNNAMED_1_LEDL_I46_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_ledl_i44_a'; 'UNNAMED_1_LEDL_I44_A'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_ledl_i42_b'; 'UNNAMED_1_LEDL_I42_B'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i6@tubii_tk2_lib.ecal_control(sch_1):unnamed_1_ledl_i3_a'; 'UNNAMED_1_LEDL_I3_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_ledl_i33_a'; 'UNNAMED_1_LEDL_I33_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_ledl_i32_a'; 'UNNAMED_1_LEDL_I32_A'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_ledl_i25_a'; 'UNNAMED_1_LEDL_I25_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_ledl_i19_b'; 'UNNAMED_1_LEDL_I19_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_ledl_i18_a'; 'UNNAMED_1_LEDL_I18_A_1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_ledl_i17_a'; 'UNNAMED_1_LEDL_I17_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_ledl_i12_a'; 'UNNAMED_1_LEDL_I12_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_inductorl_i6_a'; 'UNNAMED_1_INDUCTORL_I6_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_inductorl_i5_a'; 'UNNAMED_1_INDUCTORL_I5_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_inductorl_i4_a'; 'UNNAMED_1_INDUCTORL_I4_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_inductorl_i3_a'; 'UNNAMED_1_INDUCTORL_I3_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_hct238_i53_a2'; 'UNNAMED_1_HCT238_I53_A2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_hct238_i53_a0'; 'UNNAMED_1_HCT238_I53_A0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(6)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(4)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(2)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(0)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<0>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scaler(5)'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<5>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scaler(3)'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<3>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scaler(1)'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<1>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(8)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<8>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(6)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(4)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(2)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(0)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<0>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(10)'; 'UNNAMED_1_FRONTPORTS_I2_PUL<10>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(8)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<8>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(6)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(4)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(2)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(0)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<0>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(14)'; 'UNNAMED_1_FRONTPORTS_I2_EXT<14>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(12)'; 'UNNAMED_1_FRONTPORTS_I2_EXT<12>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(10)'; 'UNNAMED_1_FRONTPORTS_I2_EXT<10>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltolvdsoutn'; 'UNNAMED_1_FRONTPORTS_I2_ECLTO_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_dgtn'; 'UNNAMED_1_FRONTPORTS_I2_DGTN'
|
|
SPACING_CONSTRAINT_SET 'SCSDIFFPAIR'; 'UNNAMED_1_FRONTPORTS_I2_DGTN' 'UNNAMED_1_FRONTPORTS_I2_DGTP' 'UNNAMED_1_FRONTPORTS_I2_ECLTO_1' 'UNNAMED_1_FRONTPORTS_I2_ECLTO_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_clk100p'; 'UNNAMED_1_FRONTPORTS_I2_CLK100P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_clk100n'; 'UNNAMED_1_FRONTPORTS_I2_CLK100N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(7)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<7>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(5)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<5>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(3)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<3>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(1)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<1>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(9)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<9>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(7)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<7>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(5)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<5>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(3)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<3>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(1)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<1>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(15)'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<15>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(13)'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<13>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(11)'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<11>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_elliecoms_i9_telliepulse'; 'UNNAMED_1_ELLIECOMS_I9_TELLIEPU'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_elliecoms_i9_telliepredelayttl'; 'UNNAMED_1_ELLIECOMS_I9_TELLIEPR'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_elliecoms_i9_telliedelayoutttl'; 'UNNAMED_1_ELLIECOMS_I9_TELLIEDE'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_elliecoms_i9_smelliepulse'; 'UNNAMED_1_ELLIECOMS_I9_SMELLI_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_elliecoms_i9_smelliepredelayttl'; 'UNNAMED_1_ELLIECOMS_I9_SMELLIEP'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_elliecoms_i9_smelliedelayoutttl'; 'UNNAMED_1_ELLIECOMS_I9_SMELLIED'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_ds90lv019_i14_rout'; 'UNNAMED_1_DS90LV019_I14_ROUT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i20@tubii_tk2_lib.ecl_translation(sch_1):unnamed_1_ds90lv019_i14_din'; 'UNNAMED_1_DS90LV019_I14_DIN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_ds102350_i1_q'; 'UNNAMED_1_DS102350_I1_Q'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_defaultclksel_i1_reseteclp'; 'UNNAMED_1_DEFAULTCLKSEL_I1_RESE'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_defaultclksel_i1_defaultclk'; 'UNNAMED_1_DEFAULTCLKSEL_I1_DEFA'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_defaultclksel_i1_bckpclk'; 'UNNAMED_1_DEFAULTCLKSEL_I1_BCKP'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):unnamed_1_csmd0805_i9_b'; 'UNNAMED_1_CSMD0805_I9_B_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_csmd0805_i9_b'; 'UNNAMED_1_CSMD0805_I9_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_csmd0805_i8_b'; 'UNNAMED_1_CSMD0805_I8_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):unnamed_1_csmd0805_i8_a'; 'UNNAMED_1_CSMD0805_I8_A_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):unnamed_1_csmd0805_i7_a'; 'UNNAMED_1_CSMD0805_I7_A_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_csmd0805_i71_a'; 'UNNAMED_1_CSMD0805_I71_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_csmd0805_i70_b'; 'UNNAMED_1_CSMD0805_I70_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):unnamed_1_csmd0805_i6_a'; 'UNNAMED_1_CSMD0805_I6_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_csmd0805_i64_b'; 'UNNAMED_1_CSMD0805_I64_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_csmd0805_i57_b'; 'UNNAMED_1_CSMD0805_I57_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_csmd0805_i46_b'; 'UNNAMED_1_CSMD0805_I46_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_csmd0805_i23_b'; 'UNNAMED_1_CSMD0805_I23_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_csmd0805_i23_a'; 'UNNAMED_1_CSMD0805_I23_A_8'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_csmd0805_i22_b'; 'UNNAMED_1_CSMD0805_I22_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_csmd0805_i21_b'; 'UNNAMED_1_CSMD0805_I21_B_8'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_7'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_6'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_5'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_4'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_3'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_csmd0805_i20_b'; 'UNNAMED_1_CSMD0805_I20_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_csmd0805_i14_b'; 'UNNAMED_1_CSMD0805_I14_B_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_csmd0805_i13_b'; 'UNNAMED_1_CSMD0805_I13_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):unnamed_1_csmd0805_i11_a'; 'UNNAMED_1_CSMD0805_I11_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):unnamed_1_csmd0805_i10_a'; 'UNNAMED_1_CSMD0805_I10_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_csmd0603_i55_a'; 'UNNAMED_1_CSMD0603_I55_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_csmd0603_i54_b'; 'UNNAMED_1_CSMD0603_I54_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_csmd0603_i44_b'; 'UNNAMED_1_CSMD0603_I44_B'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i70@tubii_tk2_lib.ext_trigs(sch_1):unnamed_1_csmd0603_i44_a'; 'UNNAMED_1_CSMD0603_I44_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i9@tubii_tk2_lib.ellie_coms(sch_1):unnamed_1_csmd0603_i10_b'; 'UNNAMED_1_CSMD0603_I10_B_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_7'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_5'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_4'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_2'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no2'; 'UNNAMED_1_COTO2342_I1_NO2'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_7'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_6'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_5'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_4'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_3'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1_1'
|
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_no1'; 'UNNAMED_1_COTO2342_I1_NO1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc2'; 'UNNAMED_1_COTO2342_I1_NC2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_nc1'; 'UNNAMED_1_COTO2342_I1_NC1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_7'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_6'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_5'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_4'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_3'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_2'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2_1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in2'; 'UNNAMED_1_COTO2342_I1_IN2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_7'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_6'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_in1'; 'UNNAMED_1_COTO2342_I1_IN1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i24@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i23@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i22@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i21@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i20@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i19@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i18@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):page1_i5@tubii_tk2_lib.caen_buffer(sch_1):unnamed_1_coto2342_i1_ctrlin'; 'UNNAMED_1_COTO2342_I1_CTRLIN'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_cntrlregister_i10_regval'; 'UNNAMED_1_CNTRLREGISTER_I10_REG'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_cntrlregister_i10_readbit'; 'UNNAMED_1_CNTRLREGISTER_I10_REA'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_cntrlregister_i10_losel'; 'UNNAMED_1_CNTRLREGISTER_I10_LOS'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_cntrlregister_i10_ecalenable'; 'UNNAMED_1_CNTRLREGISTER_I10_ECA'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_cntrlregister_i10_datardy'; 'UNNAMED_1_CNTRLREGISTER_I10_DAT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_clocks_i2_reset'; 'UNNAMED_1_CLOCKS_I2_RESET'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_clocks_i2_datardy'; 'UNNAMED_1_CLOCKS_I2_DATARDY'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_clocks_i2_clksel'; 'UNNAMED_1_CLOCKS_I2_CLKSEL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_clocks_i2_clk100ttl'; 'UNNAMED_1_CLOCKS_I2_CLK100TTL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_clocks_i2_bckpused'; 'UNNAMED_1_CLOCKS_I2_BCKPUSED'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_defaultclk2p'; 'UNNAMED_1_CHANGECLKS_I3_DEFAU_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_defaultclk2n'; 'UNNAMED_1_CHANGECLKS_I3_DEFAULT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_changeclkp'; 'UNNAMED_1_CHANGECLKS_I3_CHANG_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_changeclkn'; 'UNNAMED_1_CHANGECLKS_I3_CHANGEC'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_bckpclk3p'; 'UNNAMED_1_CHANGECLKS_I3_BCKPC_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_bckpclk3n'; 'UNNAMED_1_CHANGECLKS_I3_BCKPC_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_bckpclk2p'; 'UNNAMED_1_CHANGECLKS_I3_BCKPC_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_changeclks_i3_bckpclk2n'; 'UNNAMED_1_CHANGECLKS_I3_BCKPCLK'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_caencoms_i8_syncttl'; 'UNNAMED_1_CAENCOMS_I8_SYNCTTL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_caencoms_i8_sync24ttl'; 'UNNAMED_1_CAENCOMS_I8_SYNC24TTL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_caencoms_i8_gtttl'; 'UNNAMED_1_CAENCOMS_I8_GTTTL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_caencoms_i8_gt2p'; 'UNNAMED_1_CAENCOMS_I8_GT2P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_caencoms_i8_datardy'; 'UNNAMED_1_CAENCOMS_I8_DATARDY'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i5_inanal'; 'UNNAMED_1_CAENBUFFER_I5_INANAL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i20_inanal'; 'UNNAMED_1_CAENBUFFER_I20_INANAL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i19_inanal'; 'UNNAMED_1_CAENBUFFER_I19_INANAL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i18_inanal'; 'UNNAMED_1_CAENBUFFER_I18_INANAL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad96687_i1_q2_1'; 'UNNAMED_1_AD96687_I1_Q2_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad96687_i1_q2'; 'UNNAMED_1_AD96687_I1_Q2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad96687_i1_q1_1'; 'UNNAMED_1_AD96687_I1_Q1_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad96687_i1_q1'; 'UNNAMED_1_AD96687_I1_Q1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i1@tubii_tk2_lib.pulse_inverter(sch_1):unnamed_1_ad8009_i1_v_1'; 'UNNAMED_1_AD8009_I1_V_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i1@tubii_tk2_lib.pulse_inverter(sch_1):unnamed_1_ad8009_i1_v'; 'UNNAMED_1_AD8009_I1_V'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i1@tubii_tk2_lib.pulse_inverter(sch_1):unnamed_1_ad8009_i1_in'; 'UNNAMED_1_AD8009_I1_IN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad7243_i2_vss'; 'UNNAMED_1_AD7243_I2_VSS'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad7243_i2_vdd'; 'UNNAMED_1_AD7243_I2_VDD'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):unnamed_1_ad7243_i2_refin'; 'UNNAMED_1_AD7243_I2_REFIN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_7915l_i16_input'; 'UNNAMED_1_7915L_I16_INPUT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i5@tubii_tk2_lib.power(sch_1):unnamed_1_7815sl_i15_input'; 'UNNAMED_1_7815SL_I15_INPUT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q7'; 'UNNAMED_1_74F164_I4_Q7'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q6'; 'UNNAMED_1_74F164_I4_Q6'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q5'; 'UNNAMED_1_74F164_I4_Q5'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q4'; 'UNNAMED_1_74F164_I4_Q4'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q3'; 'UNNAMED_1_74F164_I4_Q3'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q2'; 'UNNAMED_1_74F164_I4_Q2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q1'; 'UNNAMED_1_74F164_I4_Q1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):unnamed_1_74f164_i4_q0'; 'UNNAMED_1_74F164_I4_Q0'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q7'; 'UNNAMED_1_74F164_I49_Q7'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q6'; 'UNNAMED_1_74F164_I49_Q6'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q5'; 'UNNAMED_1_74F164_I49_Q5'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q4'; 'UNNAMED_1_74F164_I49_Q4'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q3'; 'UNNAMED_1_74F164_I49_Q3'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q2'; 'UNNAMED_1_74F164_I49_Q2'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q1'; 'UNNAMED_1_74F164_I49_Q1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i49_q0'; 'UNNAMED_1_74F164_I49_Q0'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i47_q7'; 'UNNAMED_1_74F164_I47_Q7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i47_q3'; 'UNNAMED_1_74F164_I47_Q3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i47_q2'; 'UNNAMED_1_74F164_I47_Q2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i47_q1'; 'UNNAMED_1_74F164_I47_Q1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f164_i47_q0'; 'UNNAMED_1_74F164_I47_Q0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_y3'; 'UNNAMED_1_74F07_I41_Y3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_y2'; 'UNNAMED_1_74F07_I41_Y2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_y1'; 'UNNAMED_1_74F07_I41_Y1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_y0'; 'UNNAMED_1_74F07_I41_Y0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_a3'; 'UNNAMED_1_74F07_I41_A3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_a2'; 'UNNAMED_1_74F07_I41_A2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_a1'; 'UNNAMED_1_74F07_I41_A1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_74f07_i41_a0'; 'UNNAMED_1_74F07_I41_A0'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_74f06_i3_q1'; 'UNNAMED_1_74F06_I3_Q1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_74f06_i2_q1'; 'UNNAMED_1_74F06_I2_Q1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i11@tubii_tk2_lib.tubii_spkr(sch_1):unnamed_1_74f06_i2_d1'; 'UNNAMED_1_74F06_I2_D1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_puls2_p'; 'TRIG_PULS2_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_puls2_n'; 'TRIG_PULS2_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_puls1_p'; 'TRIG_PULS1_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_puls1_n'; 'TRIG_PULS1_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_gate2_p'; 'TRIG_GATE2_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_gate2_n'; 'TRIG_GATE2_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_gate1_p'; 'TRIG_GATE1_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):trig_gate1_n'; 'TRIG_GATE1_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i9@tubii_tk2_lib.ellie_coms(sch_1):tellie_delay_buf_p'; 'TELLIE_DELAY_BUF_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i9@tubii_tk2_lib.ellie_coms(sch_1):tellie_delay_buf_n'; 'TELLIE_DELAY_BUF_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):tc'; 'TC'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):sync_2_p'; 'SYNC_2_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):sync_2_n'; 'SYNC_2_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):sync24_2_p'; 'SYNC24_2_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):sync24_2_n'; 'SYNC24_2_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):sr_data'; 'SR_DATA'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):sr_clk'; 'SR_CLK'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):spkr'; 'SPKR'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i9@tubii_tk2_lib.ellie_coms(sch_1):smellie_delay_buf_p'; 'SMELLIE_DELAY_BUF_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i9@tubii_tk2_lib.ellie_coms(sch_1):smellie_delay_buf_n'; 'SMELLIE_DELAY_BUF_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):set_retrig2'; 'SET_RETRIG2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):set_retrig1'; 'SET_RETRIG1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib9_p'; 'RIB9_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib9_n'; 'RIB9_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib8_p'; 'RIB8_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib8_n'; 'RIB8_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib7_p'; 'RIB7_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib7_n'; 'RIB7_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib6_p'; 'RIB6_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib6_n'; 'RIB6_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib5_p'; 'RIB5_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib5_n'; 'RIB5_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib4_p'; 'RIB4_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib4_n'; 'RIB4_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib3_p'; 'RIB3_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib3_n'; 'RIB3_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib2_p'; 'RIB2_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib2_n'; 'RIB2_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib1_p'; 'RIB1_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib1_n'; 'RIB1_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib10_p'; 'RIB10_P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i2@tubii_tk2_lib.ribbon_delay(sch_1):rib10_n'; 'RIB10_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):retrig_gate2'; 'RETRIG_GATE2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):retrig_gate1'; 'RETRIG_GATE1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):restart_count'; 'RESTART_COUNT'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):reset_clk_div_ecl'; 'RESET_CLK_DIV_ECL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):prep_retrig2'; 'PREP_RETRIG2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):prep_retrig1'; 'PREP_RETRIG1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):pos_trig2'; 'POS_TRIG2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):pos_trig1'; 'POS_TRIG1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):neg_trig2'; 'NEG_TRIG2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):neg_trig1'; 'NEG_TRIG1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):\load_count*\'; 'LOAD_COUNT*'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):le_mtca_mimic'; 'LE_MTCA_MIMIC'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):le_gt_delays'; 'LE_GT_DELAYS'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):le_gen_utils'; 'LE_GEN_UTILS'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):le_cntrl_reg'; 'LE_CNTRL_REG'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):le_clks'; 'LE_CLKS'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):le_caen'; 'LE_CAEN'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jx2_guide_pin2'; 'JX2_GUIDE_PIN2'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jx2_guide_pin1'; 'JX2_GUIDE_PIN1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jx1_se_1'; 'JX1_SE_1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jx1_guide_pin2'; 'JX1_GUIDE_PIN2'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jx1_guide_pin1'; 'JX1_GUIDE_PIN1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jtag_tms'; 'JTAG_TMS'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):jtag_tdi'; 'JTAG_TDI'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):i2c_sda'; 'I2C_SDA'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):i2c_scl'; 'I2C_SCL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i2@tubii_tk2_lib.caen_dig_coms(sch_1):gt_2'; 'GT_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):gt2_n'; 'GT2_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):gpio5'; 'GPIO5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):gpio4'; 'GPIO4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):gpio3'; 'GPIO3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):gpio2'; 'GPIO2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):gpio1'; 'GPIO1'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):gpio0'; 'GPIO0'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):fuzzd_clk_p'; 'FUZZD_CLK_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):fuzzd_clk_n'; 'FUZZD_CLK_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):fpga_done'; 'FPGA_DONE'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):fox_clk_lvpecl_p'; 'FOX_CLK_LVPECL_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):fox_clk_lvpecl_n'; 'FOX_CLK_LVPECL_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):fox_100mhz_p'; 'FOX_100MHZ_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):en_clk_div_ecl'; 'EN_CLK_DIV_ECL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i6@tubii_tk2_lib.ecal_control(sch_1):ecal_active_ecl_p'; 'ECAL_ACTIVE_ECL_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i6@tubii_tk2_lib.ecal_control(sch_1):ecal_active_ecl_n'; 'ECAL_ACTIVE_ECL_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):divd_clk_ttl'; 'DIVD_CLK_TTL'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):dgt_gate'; 'DGT_GATE'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_divd_p'; 'DEF_CLK_DIVD_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_divd_n'; 'DEF_CLK_DIVD_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_div8_p'; 'DEF_CLK_DIV8_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_div8_n'; 'DEF_CLK_DIV8_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_div4_p'; 'DEF_CLK_DIV4_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_div4_n'; 'DEF_CLK_DIV4_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_div2_p'; 'DEF_CLK_DIV2_P'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):def_clk_div2_n'; 'DEF_CLK_DIV2_N'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(7)'; 'COUNT_DATA_ECL<7>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(5)'; 'COUNT_DATA_ECL<5>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(3)'; 'COUNT_DATA_ECL<3>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(1)'; 'COUNT_DATA_ECL<1>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(8)'; 'BACKPLANE_OUT<8>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(6)'; 'BACKPLANE_OUT<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(4)'; 'BACKPLANE_OUT<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(2)'; 'BACKPLANE_OUT<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(10)'; 'BACKPLANE_OUT<10>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(8)'; 'BACKPLANE_IN<8>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(6)'; 'BACKPLANE_IN<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(4)'; 'BACKPLANE_IN<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(2)'; 'BACKPLANE_IN<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(10)'; 'BACKPLANE_IN<10>'
|
|
VOLTAGE '5 V'; 'VCC'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):unnamed_1_ledl_i19_a'; 'UNNAMED_1_LEDL_I19_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):unnamed_1_ledl_i18_a'; 'UNNAMED_1_LEDL_I18_A'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):unnamed_1_hct374_i2_q7'; 'UNNAMED_1_HCT374_I2_Q7'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):unnamed_1_hct374_i2_q6'; 'UNNAMED_1_HCT374_I2_Q6'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):unnamed_1_hct123_i9_q2'; 'UNNAMED_1_HCT123_I9_Q2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):unnamed_1_hct123_i9_q1'; 'UNNAMED_1_HCT123_I9_Q1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):unnamed_1_csmd0805_i15_b'; 'UNNAMED_1_CSMD0805_I15_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):unnamed_1_csmd0805_i14_b'; 'UNNAMED_1_CSMD0805_I14_B'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):unnamed_1_74f164_i1_vcc'; 'UNNAMED_1_74F164_I1_VCC'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):unnamed_1_74f164_i1_gnd'; 'UNNAMED_1_74F164_I1_GND'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):gnd'; 'GND'
|
|
WEIGHT '0'; 'GND' 'VCC'
|
|
VOLTAGE '0 V'; 'GND'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):dgt_ttl'; 'DGT_TTL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):ddgt_ttl'; 'DDGT_TTL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i1@tubii_tk2_lib.gt_delays(sch_1):ddgt_bits'; 'DDGT_BITS'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(7)'; 'CNTRL_RAW<7>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(5)'; 'CNTRL_RAW<5>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(3)'; 'CNTRL_RAW<3>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(1)'; 'CNTRL_RAW<1>'
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DIFFERENTIAL_PAIR 'DP_USE_DEFAULT'; 'USE_DEFAULT_N' 'USE_DEFAULT_P'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I4_Q3'; 'UNNAMED_1_MC10E116_I4_Q3' 'UNNAMED_1_MC10E116_I4_Q3_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I4_Q1'; 'UNNAMED_1_MC10E116_I4_Q1' 'UNNAMED_1_MC10E116_I4_Q1_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I3_Q3'; 'UNNAMED_1_MC10E116_I3_Q3' 'UNNAMED_1_MC10E116_I3_Q3_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I3_Q1'; 'UNNAMED_1_MC10E116_I3_Q1' 'UNNAMED_1_MC10E116_I3_Q1_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I22_Q1'; 'UNNAMED_1_MC10E116_I22_Q1' 'UNNAMED_1_MC10E116_I22_Q1_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I1_Q3'; 'UNNAMED_1_MC10E116_I1_Q3' 'UNNAMED_1_MC10E116_I1_Q3_1'
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BUS_NAME 'LE'; 'UNNAMED_1_HCT238_I53_A0' 'UNNAMED_1_HCT238_I53_A1' 'UNNAMED_1_HCT238_I53_A2'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_SYNCLVDS'; 'UNNAMED_1_FRONTPORTS_I2_SYNCLVD' 'UNNAMED_1_FRONTPORTS_I2_SYNCL_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_SYNC24'; 'UNNAMED_1_FRONTPORTS_I2_SYNC24N' 'UNNAMED_1_FRONTPORTS_I2_SYNC24P'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_SYNC24LVDS'; 'UNNAMED_1_FRONTPORTS_I2_SYNC24L' 'UNNAMED_1_FRONTPORTS_I2_SYNC2_1'
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BUS_NAME 'UNNAMED_1_FRONTPORTS_I2_SCOPEOU'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<0>' 'UNNAMED_1_FRONTPORTS_I2_SCOP<1>' 'UNNAMED_1_FRONTPORTS_I2_SCOP<2>' 'UNNAMED_1_FRONTPORTS_I2_SCOP<3>' 'UNNAMED_1_FRONTPORTS_I2_SCOP<4>' 'UNNAMED_1_FRONTPORTS_I2_SCOP<5>',
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'UNNAMED_1_FRONTPORTS_I2_SCOP<6>' 'UNNAMED_1_FRONTPORTS_I2_SCOP<7>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_RIBBONPULSEOUT'; 'UNNAMED_1_FRONTPORTS_I2_RIBBO_2' 'UNNAMED_1_FRONTPORTS_I2_RIBBO_3'
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BUS_NAME 'UNNAMED_1_FRONTPORTS_I2_PULSE_2'; 'UNNAMED_1_FRONTPORTS_I2_PUL<10>' 'UNNAMED_1_FRONTPORTS_I2_PUL<11>' 'UNNAMED_1_FRONTPORTS_I2_PULS<0>' 'UNNAMED_1_FRONTPORTS_I2_PULS<1>' 'UNNAMED_1_FRONTPORTS_I2_PULS<2>' 'UNNAMED_1_FRONTPORTS_I2_PULS<3>',
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'UNNAMED_1_FRONTPORTS_I2_PULS<4>' 'UNNAMED_1_FRONTPORTS_I2_PULS<5>' 'UNNAMED_1_FRONTPORTS_I2_PULS<6>' 'UNNAMED_1_FRONTPORTS_I2_PULS<7>' 'UNNAMED_1_FRONTPORTS_I2_PULS<8>' 'UNNAMED_1_FRONTPORTS_I2_PULS<9>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_MTCAMIMIC2OUT'; 'UNNAMED_1_FRONTPORTS_I2_MTCAM_3' 'UNNAMED_1_FRONTPORTS_I2_MTCAM_4'
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DIFFERENTIAL_PAIR 'DP_LVDSTOECL'; 'UNNAMED_1_FRONTPORTS_I2_LVDSTOE' 'UNNAMED_1_FRONTPORTS_I2_LVDST_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_GT'; 'UNNAMED_1_FRONTPORTS_I2_GTN' 'UNNAMED_1_FRONTPORTS_I2_GTP'
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DIFFERENTIAL_PAIR 'DP_ECLTOLVDS'; 'UNNAMED_1_FRONTPORTS_I2_ECLTO_1' 'UNNAMED_1_FRONTPORTS_I2_ECLTO_2'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_ECLTOLVDSIN'; 'UNNAMED_1_FRONTPORTS_I2_ECLTOLV' 'VBB_TRANS'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_CLK100'; 'UNNAMED_1_FRONTPORTS_I2_CLK100N' 'UNNAMED_1_FRONTPORTS_I2_CLK100P'
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BUS_NAME 'UNNAMED_1_EXTTRIGS_I70_EXTTRIGO'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<10>' 'UNNAMED_1_EXTTRIGS_I70_EXTT<11>' 'UNNAMED_1_EXTTRIGS_I70_EXTT<12>' 'UNNAMED_1_EXTTRIGS_I70_EXTT<13>' 'UNNAMED_1_EXTTRIGS_I70_EXTT<14>' 'UNNAMED_1_EXTTRIGS_I70_EXTT<15>',
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'UNNAMED_1_EXTTRIGS_I70_EXTTR<0>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<1>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<2>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<3>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<4>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<5>',
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'UNNAMED_1_EXTTRIGS_I70_EXTTR<6>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<7>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<8>' 'UNNAMED_1_EXTTRIGS_I70_EXTTR<9>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_DEFAULTCLKSEL_I1_DEFAULTCLK'; 'UNNAMED_1_DEFAULTCLKSEL_I1_BCKP' 'UNNAMED_1_MC10E116_I1_D0'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CHANGECLKS_I3_DEFAULTCLK2'; 'UNNAMED_1_CHANGECLKS_I3_DEFAULT' 'UNNAMED_1_CHANGECLKS_I3_DEFAU_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CHANGECLKS_I3_BCKPCLK3'; 'UNNAMED_1_CHANGECLKS_I3_BCKPC_2' 'UNNAMED_1_CHANGECLKS_I3_BCKPC_3'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_AD96687_I1_Q1'; 'UNNAMED_1_AD96687_I1_Q1' 'UNNAMED_1_AD96687_I1_Q1_1'
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DIFFERENTIAL_PAIR 'DP_TRIG_PULS1'; 'TRIG_PULS1_N' 'TRIG_PULS1_P'
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DIFFERENTIAL_PAIR 'DP_TRIG_GATE1'; 'TRIG_GATE1_N' 'TRIG_GATE1_P'
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DIFFERENTIAL_PAIR 'DP_SYNC_2'; 'SYNC_2_N' 'SYNC_2_P'
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DIFFERENTIAL_PAIR 'DP_SMELLIE_DELAY_BUF'; 'SMELLIE_DELAY_BUF_N' 'SMELLIE_DELAY_BUF_P'
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DIFFERENTIAL_PAIR 'DP_RIB8'; 'RIB8_N' 'RIB8_P'
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DIFFERENTIAL_PAIR 'DP_RIB6'; 'RIB6_N' 'RIB6_P'
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DIFFERENTIAL_PAIR 'DP_RIB4'; 'RIB4_N' 'RIB4_P'
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DIFFERENTIAL_PAIR 'DP_RIB2'; 'RIB2_N' 'RIB2_P'
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DIFFERENTIAL_PAIR 'DP_RIB10'; 'RIB10_N' 'RIB10_P'
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DIFFERENTIAL_PAIR 'DP_GT2_N'; 'GT2_N' 'UNNAMED_1_CAENCOMS_I8_GT2P'
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DIFFERENTIAL_PAIR 'DP_FOX_CLK_LVPECL'; 'FOX_CLK_LVPECL_N' 'FOX_CLK_LVPECL_P'
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DIFFERENTIAL_PAIR 'DP_DEF_CLK_DIVD'; 'DEF_CLK_DIVD_N' 'DEF_CLK_DIVD_P'
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DIFFERENTIAL_PAIR 'DP_DEF_CLK_DIV4'; 'DEF_CLK_DIV4_N' 'DEF_CLK_DIV4_P'
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DIFFERENTIAL_PAIR 'DP_CLK_SEL_ECL'; 'CLK_SEL_ECL_N' 'CLK_SEL_ECL_P'
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DIFFERENTIAL_PAIR 'DP_CHOSEN_CLK'; 'CHOSEN_CLK_N' 'CHOSEN_CLK_P'
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DIFFERENTIAL_PAIR 'DP_CHANGE_CLK2'; 'CHANGE_CLK2_N' 'CHANGE_CLK2_P'
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BUS_NAME 'BACKPLANE_OUT'; 'BACKPLANE_OUT<10>' 'BACKPLANE_OUT<1>' 'BACKPLANE_OUT<2>' 'BACKPLANE_OUT<3>' 'BACKPLANE_OUT<4>' 'BACKPLANE_OUT<5>',
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'BACKPLANE_OUT<6>' 'BACKPLANE_OUT<7>' 'BACKPLANE_OUT<8>' 'BACKPLANE_OUT<9>'
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DIFFERENTIAL_PAIR 'LO_SEL_ECL'; 'LO_SEL_ECL_N' 'LO_SEL_ECL_P'
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BUS_NAME 'CNTRL_RAW'; 'CNTRL_RAW<0>' 'CNTRL_RAW<1>' 'CNTRL_RAW<2>' 'CNTRL_RAW<3>' 'CNTRL_RAW<4>' 'CNTRL_RAW<5>',
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'CNTRL_RAW<6>' 'CNTRL_RAW<7>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_MTCDLO'; 'UNNAMED_1_MC10E116_I2_D0' 'UNNAMED_1_FRONTPORTS_I2_MTCDLO'
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BUS_NAME 'BACKPLANE_IN'; 'BACKPLANE_IN<10>' 'BACKPLANE_IN<1>' 'BACKPLANE_IN<2>' 'BACKPLANE_IN<3>' 'BACKPLANE_IN<4>' 'BACKPLANE_IN<5>',
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'BACKPLANE_IN<6>' 'BACKPLANE_IN<7>' 'BACKPLANE_IN<8>' 'BACKPLANE_IN<9>'
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DIFFERENTIAL_PAIR 'DP_BCKP_CLK_BUFD'; 'BCKP_CLK_BUFD_N' 'BCKP_CLK_BUFD_P'
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DIFFERENTIAL_PAIR 'DP_CHOSEN_CLK2'; 'CHOSEN_CLK2_N' 'CHOSEN_CLK2_P'
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DIFFERENTIAL_PAIR 'DP_CLK_BAD'; 'CLK_BAD_N' 'CLK_BAD_P'
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BUS_NAME 'COUNT_DATA_ECL'; 'COUNT_DATA_ECL<1>' 'COUNT_DATA_ECL<2>' 'COUNT_DATA_ECL<3>' 'COUNT_DATA_ECL<4>' 'COUNT_DATA_ECL<5>' 'COUNT_DATA_ECL<6>',
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'COUNT_DATA_ECL<7>'
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DIFFERENTIAL_PAIR 'DP_DEF_CLK_DIV2'; 'DEF_CLK_DIV2_N' 'DEF_CLK_DIV2_P'
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DIFFERENTIAL_PAIR 'DP_DEF_CLK_DIV8'; 'DEF_CLK_DIV8_N' 'DEF_CLK_DIV8_P'
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DIFFERENTIAL_PAIR 'ECAL_ACTIVE_ECL'; 'ECAL_ACTIVE_ECL_N' 'ECAL_ACTIVE_ECL_P'
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DIFFERENTIAL_PAIR 'DP_FUZZD_CLK'; 'FUZZD_CLK_N' 'FUZZD_CLK_P'
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DIFFERENTIAL_PAIR 'DP_RIB1'; 'RIB1_N' 'RIB1_P'
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DIFFERENTIAL_PAIR 'DP_RIB3'; 'RIB3_N' 'RIB3_P'
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DIFFERENTIAL_PAIR 'DP_RIB5'; 'RIB5_N' 'RIB5_P'
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DIFFERENTIAL_PAIR 'DP_RIB7'; 'RIB7_N' 'RIB7_P'
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DIFFERENTIAL_PAIR 'DP_RIB9'; 'RIB9_N' 'RIB9_P'
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DIFFERENTIAL_PAIR 'DP_SYNC24_2'; 'SYNC24_2_N' 'SYNC24_2_P'
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DIFFERENTIAL_PAIR 'DP_TELLIE_DELAY_BUF'; 'TELLIE_DELAY_BUF_N' 'TELLIE_DELAY_BUF_P'
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DIFFERENTIAL_PAIR 'DP_TRIG_GATE2'; 'TRIG_GATE2_N' 'TRIG_GATE2_P'
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DIFFERENTIAL_PAIR 'DP_TRIG_PULS2'; 'TRIG_PULS2_N' 'TRIG_PULS2_P'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_AD96687_I1_Q2'; 'UNNAMED_1_AD96687_I1_Q2' 'UNNAMED_1_AD96687_I1_Q2_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CHANGECLKS_I3_BCKPCLK2'; 'UNNAMED_1_CHANGECLKS_I3_BCKPCLK' 'UNNAMED_1_CHANGECLKS_I3_BCKPC_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CHANGECLKS_I3_CHANGECLK'; 'UNNAMED_1_CHANGECLKS_I3_CHANGEC' 'UNNAMED_1_CHANGECLKS_I3_CHANG_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CSMD0603_I10_B'; 'UNNAMED_1_CSMD0603_I10_B_1' 'UNNAMED_1_FRONTPORTS_I2_SMELLIE'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CSMD0603_I54_B'; 'UNNAMED_1_CSMD0603_I54_B' 'UNNAMED_1_FRONTPORTS_I2_EXTT<0>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CSMD0603_I55_A'; 'UNNAMED_1_CSMD0603_I55_A' 'UNNAMED_1_FRONTPORTS_I2_EXTT<4>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_CSMD0805_I64_B'; 'UNNAMED_1_CSMD0805_I64_B' 'UNNAMED_1_CSMD0805_I70_B'
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BUS_NAME 'UNNAMED_1_FRONTPORTS_I2_CAENOUT'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<0>' 'UNNAMED_1_FRONTPORTS_I2_CAEN<1>' 'UNNAMED_1_FRONTPORTS_I2_CAEN<2>' 'UNNAMED_1_FRONTPORTS_I2_CAEN<3>' 'UNNAMED_1_FRONTPORTS_I2_CAEN<4>' 'UNNAMED_1_FRONTPORTS_I2_CAEN<5>',
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'UNNAMED_1_FRONTPORTS_I2_CAEN<6>' 'UNNAMED_1_FRONTPORTS_I2_CAEN<7>'
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DIFFERENTIAL_PAIR 'UNNAMED_1_FRONTPORTS_I2_DGT'; 'UNNAMED_1_FRONTPORTS_I2_DGTN' 'UNNAMED_1_FRONTPORTS_I2_DGTP'
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BUS_NAME 'UNNAMED_1_FRONTPORTS_I2_EXTTRIG'; 'UNNAMED_1_FRONTPORTS_I2_EXT<10>' 'UNNAMED_1_FRONTPORTS_I2_EXT<11>' 'UNNAMED_1_FRONTPORTS_I2_EXT<12>' 'UNNAMED_1_FRONTPORTS_I2_EXT<13>' 'UNNAMED_1_FRONTPORTS_I2_EXT<14>' 'UNNAMED_1_FRONTPORTS_I2_EXT<15>',
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'UNNAMED_1_FRONTPORTS_I2_EXTT<0>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<1>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<2>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<3>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<4>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<5>',
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'UNNAMED_1_FRONTPORTS_I2_EXTT<6>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<7>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<8>' 'UNNAMED_1_FRONTPORTS_I2_EXTT<9>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_LOSTAROUT'; 'UNNAMED_1_FRONTPORTS_I2_LOSTARO' 'UNNAMED_1_FRONTPORTS_I2_LOSTA_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_MTCAMIMIC1OUT'; 'UNNAMED_1_FRONTPORTS_I2_MTCAMIM' 'UNNAMED_1_FRONTPORTS_I2_MTCAM_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_RIBBONPULSEIN'; 'UNNAMED_1_FRONTPORTS_I2_RIBBONP' 'UNNAMED_1_FRONTPORTS_I2_RIBBO_1'
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BUS_NAME 'UNNAMED_1_FRONTPORTS_I2_SCALER'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<1>' 'UNNAMED_1_FRONTPORTS_I2_SCAL<2>' 'UNNAMED_1_FRONTPORTS_I2_SCAL<3>' 'UNNAMED_1_FRONTPORTS_I2_SCAL<4>' 'UNNAMED_1_FRONTPORTS_I2_SCAL<5>' 'UNNAMED_1_FRONTPORTS_I2_SCAL<6>'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_FRONTPORTS_I2_SYNC'; 'UNNAMED_1_FRONTPORTS_I2_SYNCN' 'UNNAMED_1_FRONTPORTS_I2_SYNCP'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I1_Q0'; 'UNNAMED_1_MC10E116_I1_Q0' 'UNNAMED_1_MC10E116_I1_Q0_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I22_Q0'; 'UNNAMED_1_MC10E116_I22_Q0' 'UNNAMED_1_MC10E116_I22_Q0_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I3_Q0'; 'UNNAMED_1_MC10E116_I3_Q0' 'UNNAMED_1_MC10E116_I3_Q0_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I3_Q2'; 'UNNAMED_1_MC10E116_I3_Q2' 'UNNAMED_1_MC10E116_I3_Q2_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I4_Q0'; 'UNNAMED_1_MC10E116_I4_Q0' 'UNNAMED_1_MC10E116_I4_Q0_1'
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DIFFERENTIAL_PAIR 'DP_UNNAMED_1_MC10E116_I4_Q2'; 'UNNAMED_1_MC10E116_I4_Q2' 'UNNAMED_1_MC10E116_I4_Q2_1'
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DIFFERENTIAL_PAIR 'DP_USE_BCKP'; 'USE_BCKP_N' 'USE_BCKP_P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(0)'; 'CNTRL_RAW<0>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(2)'; 'CNTRL_RAW<2>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(4)'; 'CNTRL_RAW<4>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i10@tubii_tk2_lib.cntrl_register(sch_1):cntrl_raw(6)'; 'CNTRL_RAW<6>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):vcc'; 'VCC'
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VOLTAGE '-5.2 V'; 'VEE'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):vee'; 'VEE'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i2@tubii_tk2_lib.select_lo_src(sch_1):lo_sel_ecl_n'; 'LO_SEL_ECL_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i2@tubii_tk2_lib.select_lo_src(sch_1):lo_sel_ecl_p'; 'LO_SEL_ECL_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i2@tubii_tk2_lib.select_lo_src(sch_1):lo_star_raw'; 'LO_STAR_RAW'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):unnamed_1_gtdelays_i1_ddgtn'; 'UNNAMED_1_GTDELAYS_I1_DDGTN'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):unnamed_1_gtdelays_i1_ddgtp'; 'UNNAMED_1_GTDELAYS_I1_DDGTP'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i2@tubii_tk2_lib.select_lo_src(sch_1):unnamed_1_ledl_i11_a'; 'UNNAMED_1_LEDL_I11_A'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i2@tubii_tk2_lib.select_lo_src(sch_1):unnamed_1_mc10e116_i2_d0'; 'UNNAMED_1_MC10E116_I2_D0'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i13@tubii_tk2_lib.lo_gen(sch_1):page1_i2@tubii_tk2_lib.select_lo_src(sch_1):unnamed_1_mc10e116_i2_q0'; 'UNNAMED_1_MC10E116_I2_Q0'
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VOLTAGE '-2 V'; 'VTT'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):vtt'; 'VTT'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(1)'; 'BACKPLANE_IN<1>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(3)'; 'BACKPLANE_IN<3>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(5)'; 'BACKPLANE_IN<5>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(7)'; 'BACKPLANE_IN<7>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_in(9)'; 'BACKPLANE_IN<9>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(1)'; 'BACKPLANE_OUT<1>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(3)'; 'BACKPLANE_OUT<3>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(5)'; 'BACKPLANE_OUT<5>'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(7)'; 'BACKPLANE_OUT<7>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i12@tubii_tk2_lib.baseline_buffer(sch_1):backplane_out(9)'; 'BACKPLANE_OUT<9>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):\bckp_clk*\'; 'BCKP_CLK*'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):bckp_clk_bufd_n'; 'BCKP_CLK_BUFD_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):bckp_clk_bufd_p'; 'BCKP_CLK_BUFD_P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i21_cntrl'; 'UNNAMED_1_CAENBUFFER_I21_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i22_cntrl'; 'UNNAMED_1_CAENBUFFER_I22_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i8@tubii_tk2_lib.caen_coms(sch_1):page1_i1@tubii_tk2_lib.caen_analog_coms(sch_1):unnamed_1_caenbuffer_i23_cntrl'; 'UNNAMED_1_CAENBUFFER_I23_CNTRL'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i1@tubii_tk2_lib.microzed_module(sch_1):\carrier_srst#\'; 'CARRIER_SRST#'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):change_clk2_n'; 'CHANGE_CLK2_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):change_clk2_p'; 'CHANGE_CLK2_P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):chosen_clk2_n'; 'CHOSEN_CLK2_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):chosen_clk2_p'; 'CHOSEN_CLK2_P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):chosen_clk_n'; 'CHOSEN_CLK_N'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i3@tubii_tk2_lib.change_clks(sch_1):chosen_clk_p'; 'CHOSEN_CLK_P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):clk_bad_n'; 'CLK_BAD_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):clk_bad_p'; 'CLK_BAD_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):clk_missed'; 'CLK_MISSED'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):clk_sel_ecl_n'; 'CLK_SEL_ECL_N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i1@tubii_tk2_lib.default_clk_sel(sch_1):clk_sel_ecl_p'; 'CLK_SEL_ECL_P'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):clk_state'; 'CLK_STATE'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):comp1_thresh'; 'COMP1_THRESH'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):comp2_thresh'; 'COMP2_THRESH'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):count'; 'COUNT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(0)'; 'COUNT_DATA_ECL<0>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(2)'; 'COUNT_DATA_ECL<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(4)'; 'COUNT_DATA_ECL<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):count_data_ecl(6)'; 'COUNT_DATA_ECL<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(10)'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<10>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(12)'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<12>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(14)'; 'UNNAMED_1_EXTTRIGS_I70_EXTT<14>'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(0)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<0>'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(2)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<2>'
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|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(4)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(6)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_exttrigs_i70_exttrigout(8)'; 'UNNAMED_1_EXTTRIGS_I70_EXTTR<8>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(0)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<0>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(2)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<2>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(4)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<4>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_caenoutanal(6)'; 'UNNAMED_1_FRONTPORTS_I2_CAEN<6>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_dgtp'; 'UNNAMED_1_FRONTPORTS_I2_DGTP'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltolvdsin'; 'UNNAMED_1_FRONTPORTS_I2_ECLTOLV'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltonimin'; 'UNNAMED_1_FRONTPORTS_I2_ECLTONI'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltottlin'; 'UNNAMED_1_FRONTPORTS_I2_ECLTOTT'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltolvdsoutp'; 'UNNAMED_1_FRONTPORTS_I2_ECLTO_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltonimout'; 'UNNAMED_1_FRONTPORTS_I2_ECLTO_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ecltottlout'; 'UNNAMED_1_FRONTPORTS_I2_ECLTO_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(11)'; 'UNNAMED_1_FRONTPORTS_I2_EXT<11>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(13)'; 'UNNAMED_1_FRONTPORTS_I2_EXT<13>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(15)'; 'UNNAMED_1_FRONTPORTS_I2_EXT<15>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_extpedin'; 'UNNAMED_1_FRONTPORTS_I2_EXTPEDI'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_extpedout'; 'UNNAMED_1_FRONTPORTS_I2_EXTPEDO'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(1)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<1>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(3)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<3>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(5)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<5>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(7)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<7>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_exttrigin(9)'; 'UNNAMED_1_FRONTPORTS_I2_EXTT<9>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_genericdelayin'; 'UNNAMED_1_FRONTPORTS_I2_GENERIC'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_genericdelayout'; 'UNNAMED_1_FRONTPORTS_I2_GENER_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_genericpulseout'; 'UNNAMED_1_FRONTPORTS_I2_GENER_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_gtn'; 'UNNAMED_1_FRONTPORTS_I2_GTN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_gtnim'; 'UNNAMED_1_FRONTPORTS_I2_GTNIM'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_gtp'; 'UNNAMED_1_FRONTPORTS_I2_GTP'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_lostaroutn'; 'UNNAMED_1_FRONTPORTS_I2_LOSTARO'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_lostaroutp'; 'UNNAMED_1_FRONTPORTS_I2_LOSTA_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_lvdstoeclinn'; 'UNNAMED_1_FRONTPORTS_I2_LVDSTOE'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_lvdstoeclinp'; 'UNNAMED_1_FRONTPORTS_I2_LVDST_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_lvdstoeclout'; 'UNNAMED_1_FRONTPORTS_I2_LVDST_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcamimic1outn'; 'UNNAMED_1_FRONTPORTS_I2_MTCAMIM'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcamimic1outp'; 'UNNAMED_1_FRONTPORTS_I2_MTCAM_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcamimic1pulseanal'; 'UNNAMED_1_FRONTPORTS_I2_MTCAM_2'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcamimic2outn'; 'UNNAMED_1_FRONTPORTS_I2_MTCAM_3'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcamimic2outp'; 'UNNAMED_1_FRONTPORTS_I2_MTCAM_4'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcamimic2pulseanal'; 'UNNAMED_1_FRONTPORTS_I2_MTCAM_5'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_mtcdlo'; 'UNNAMED_1_FRONTPORTS_I2_MTCDLO'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_nimtoeclin'; 'UNNAMED_1_FRONTPORTS_I2_NIMTOEC'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_nimtoeclout'; 'UNNAMED_1_FRONTPORTS_I2_NIMTO_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(11)'; 'UNNAMED_1_FRONTPORTS_I2_PUL<11>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(1)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<1>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(3)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<3>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(5)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<5>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(7)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<7>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinanal(9)'; 'UNNAMED_1_FRONTPORTS_I2_PULS<9>'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinvin'; 'UNNAMED_1_FRONTPORTS_I2_PULSEIN'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_pulseinvout'; 'UNNAMED_1_FRONTPORTS_I2_PULSE_1'
|
|
LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ribbonpulseinn'; 'UNNAMED_1_FRONTPORTS_I2_RIBBONP'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ribbonpulseinp'; 'UNNAMED_1_FRONTPORTS_I2_RIBBO_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ribbonpulseoutn'; 'UNNAMED_1_FRONTPORTS_I2_RIBBO_2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ribbonpulseoutp'; 'UNNAMED_1_FRONTPORTS_I2_RIBBO_3'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scaler(2)'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<2>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scaler(4)'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<4>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scaler(6)'; 'UNNAMED_1_FRONTPORTS_I2_SCAL<6>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(1)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<1>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(3)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<3>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(5)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<5>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_scopeoutanal(7)'; 'UNNAMED_1_FRONTPORTS_I2_SCOP<7>'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_smelliedelayin'; 'UNNAMED_1_FRONTPORTS_I2_SMELLIE'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_smelliedelayout'; 'UNNAMED_1_FRONTPORTS_I2_SMELL_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_smelliepulseout'; 'UNNAMED_1_FRONTPORTS_I2_SMELL_2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_sync24lvdsn'; 'UNNAMED_1_FRONTPORTS_I2_SYNC24L'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_sync24n'; 'UNNAMED_1_FRONTPORTS_I2_SYNC24N'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_sync24p'; 'UNNAMED_1_FRONTPORTS_I2_SYNC24P'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_sync24lvdsp'; 'UNNAMED_1_FRONTPORTS_I2_SYNC2_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_synclvdsn'; 'UNNAMED_1_FRONTPORTS_I2_SYNCLVD'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_synclvdsp'; 'UNNAMED_1_FRONTPORTS_I2_SYNCL_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_syncn'; 'UNNAMED_1_FRONTPORTS_I2_SYNCN'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_syncp'; 'UNNAMED_1_FRONTPORTS_I2_SYNCP'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_telliedelayin'; 'UNNAMED_1_FRONTPORTS_I2_TELLIED'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_telliepulseout'; 'UNNAMED_1_FRONTPORTS_I2_TELLIEP'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_telliedelayout'; 'UNNAMED_1_FRONTPORTS_I2_TELLI_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ttltoeclin'; 'UNNAMED_1_FRONTPORTS_I2_TTLTOEC'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_ttltoeclout'; 'UNNAMED_1_FRONTPORTS_I2_TTLTO_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_tubclkin'; 'UNNAMED_1_FRONTPORTS_I2_TUBCLKI'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):unnamed_1_frontports_i2_tubiirtout'; 'UNNAMED_1_FRONTPORTS_I2_TUBIIRT'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_generalutilities_i4_genericpulsein'; 'UNNAMED_1_GENERALUTILITIES_I4_1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_generalutilities_i4_genericdelayin'; 'UNNAMED_1_GENERALUTILITIES_I4_G'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_hct123_i22_q1'; 'UNNAMED_1_HCT123_I22_Q1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i4@tubii_tk2_lib.general_utilities(sch_1):page1_i5@tubii_tk2_lib.generic_delays(sch_1):unnamed_1_hct123_i22_q2'; 'UNNAMED_1_HCT123_I22_Q2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i2@tubii_tk2_lib.clocks(sch_1):page1_i2@tubii_tk2_lib.fault_detection(sch_1):unnamed_1_hct123_i29_cext1'; 'UNNAMED_1_HCT123_I29_CEXT1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_hct123_i54_q1'; 'UNNAMED_1_HCT123_I54_Q1'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):page1_i3@tubii_tk2_lib.mtca_mimic(sch_1):page1_i16@tubii_tk2_lib.trigger_logic(sch_1):unnamed_1_hct123_i54_q2'; 'UNNAMED_1_HCT123_I54_Q2'
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LOGICAL_PATH '@tubii_tk2_lib.tubii(sch_1):page1_i1@tubii_tk2_lib.tubii_pcb(sch_1):unnamed_1_hct238_i53_a1'; 'UNNAMED_1_HCT238_I53_A1'
|
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$END
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