74 lines
3.3 KiB
Plaintext
74 lines
3.3 KiB
Plaintext
{ Machine generated file created by SPI }
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{ Last modified was 10:55:36 Tuesday, July 07, 2015 }
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{ NOTE: Do not modify the contents of this file. If this is regenerated by }
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{ SPI, your modifications will be overwritten. }
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START_PROJECTMGR
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LastFlow 'Board Design'
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END_PROJECTMGR
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START_GLOBAL
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view_pcb './worklib/tubii/physical'
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design_name 'tubii'
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design_library 'tubii_tk2_lib'
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library 'tubii_tk2_lib' 'standard' 'diode' 'dig_ecl' 'opa' 'opamp' 'special' 'capacitors' 'diodes' 'ecl' 'physparts' 'regulators' 'resistors' 'SNO_standard' 'ttl' 'misc' 'transistors'
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temp_dir 'temp'
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cpm_version '16.6'
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session_name 'ProjectMgr13033'
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physical_path './worklib/tubii/physical'
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END_GLOBAL
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START_CONCEPTHDL
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PROP_COLOR 'default'
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NOTE_COLOR 'default'
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BACKGROUND_COLOR 'black'
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LOGIC_GRID_SIZE '0.05'
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PLOT_FIT_TO_PAGE 'ON'
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SEARCH_HISTORY 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'DATA_RDY' 'TRIG_PULS1_P' '' 'U8' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'u10' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'C138' 'C137' 'DATA_RDY' 'TRIG_PULS1_P' '' 'C176' 'R186' 'DATA_RDY' 'TRIG_PULS1_P' '' 'u70' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'U20' 'U69' 'DATA_RDY' 'TRIG_PULS1_P' '' 'R152' 'R158' 'DATA_RDY' 'TRIG_PULS1_P' '' 'C133' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'R349' 'R12' 'C183' 'C108' 'DATA_RDY' 'R66' 'TP131' 'TP134' 'U8' 'DATA_RDY' 'U21' 'U42' 'DATA_RDY' 'TRIG_PULS1_P' '' 'u33' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'U34' 'U30' 'DATA_RDY' 'TRIG_PULS1_P' '' 'TP40' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'TP58' 'TP44' 'DATA_RDY' 'TRIG_PULS1_P' '' 'R225' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'D14' 'TP166' 'U80' 'DATA_RDY' 'TRIG_PULS1_P' 'R340' 'U94' 'DATA_RDY' 'TRIG_PULS1_P' '' 'R144' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'U72' 'C181' 'D17' 'D4' 'D5' '74f164' '74f165' 'TP22' 'TP92' 'TP64' 'C75' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'c114' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'chosen_clk' 'C114' 'DATA_RDY' 'TRIG_PULS1_P' '' 'VBB_TRANS' 'UNNAMED_2_FRONTPORTS_I2_MTCDLO' 'UNNAMED_1_MC10H131_I62_D1' 'UNNAMED_1_MC10H131_I62_CC' 'UNNAMED_1_MC10H131_I59_D2' 'C18' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'C206' 'U23' 'TP18' 'DATA_RDY' 'TRIG_PULS1_P' 'V3P3' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'C224' 'DATA_RDY' 'TRIG_PULS1_P' '' 'mc10h116' 'SIP_HEADER_2PIN' 'SIP' 'SIP2' 'DATA_RDY' 'TRIG_PULS1_P' 'sn74s32' 'sy100el34l' 'sy100el34ll' 'sy100el91l' 'SS22SDP2' 'SIP_2Pin' 'SIP_' 'SIP' 'dr610f1' 'RES_L' '0.33UF' '5PF' '5 pf' '499' '10k'
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PLOTTER_FACILITY 'DEVICE'
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PLOT_EDGE_TO_EDGE 'ON'
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PAPER_SIZE '1'
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PAPER_ORIENTATION '2'
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PAPER_SOURCE '15'
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WPLOTTER_NAME 'CutePDF Writer'
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END_CONCEPTHDL
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START_PKGRXL
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regenerate_physical_net_name 'OFF'
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electrical_constraints 'ON'
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overwrite_constraints 'OFF'
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END_PKGRXL
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START_DESIGNSYNC
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replace_symbol '0'
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etch_removal 'NO'
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ignore_fixed 'NO'
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create_user_prop 'NO'
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run_packager 'YES'
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run_netrev 'YES'
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backannotate_forward 'YES'
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last_board_file 'TubiiPCB_V6.brd'
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run_genfeedformat 'YES'
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diff_extract_constraints 'YES'
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run_feedback 'YES'
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backannotate_feedback 'YES'
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END_DESIGNSYNC
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START_BOMHDL
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last_output_file './worklib/tubii/bom/BOM.rpt'
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last_template_file 'C:/Cadence/SPB_16.6/share/cdssetup/template.bom'
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last_standard_option '1'
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last_what_to_output '0'
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last_variant_file ''
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last_ss_delimiter 'Comma ,'
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use_filters '0'
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last_callout_file ''
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last_variant ''
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END_BOMHDL
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START_CONSTRAINT_MGR
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EDIT_PHYSICAL_SPACING_CONSTRAINTS 'ON'
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END_CONSTRAINT_MGR
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