Tubii_Tk2/worklib/back_ports/entity/vhdl.vhd
2015-05-28 01:20:24 -04:00

10 lines
219 B
VHDL

-- generated by newgenasym Thu May 28 01:16:03 2015
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity back_ports is
port (
UNNUSED_MZ: IN STD_LOGIC_VECTOR (0 TO 15));
end back_ports;