10 lines
219 B
VHDL
10 lines
219 B
VHDL
-- generated by newgenasym Thu May 28 01:16:03 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity back_ports is
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port (
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UNNUSED_MZ: IN STD_LOGIC_VECTOR (0 TO 15));
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end back_ports;
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