17 lines
265 B
Verilog
17 lines
265 B
Verilog
// generated by newgenasym Tue May 12 17:59:41 2015
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module caen_buffer (cntrl, in_anal, out_att, out_clip, vref5m);
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input cntrl;
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input in_anal;
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output out_att;
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output out_clip;
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input vref5m;
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initial
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begin
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end
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endmodule
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