21 lines
602 B
VHDL
21 lines
602 B
VHDL
-- generated by newgenasym Tue Mar 03 16:31:26 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity change_clks is
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port (
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BCKP_CLK2_N: IN STD_LOGIC;
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BCKP_CLK2_P: IN STD_LOGIC;
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BCKP_CLK3_N: IN STD_LOGIC;
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BCKP_CLK3_P: IN STD_LOGIC;
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BCKP_USED: OUT STD_LOGIC;
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CHANGE_CLK_N: IN STD_LOGIC;
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CHANGE_CLK_P: IN STD_LOGIC;
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CLK100_N: OUT STD_LOGIC;
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CLK100_P: OUT STD_LOGIC;
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CLK100_TTL: OUT STD_LOGIC;
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DEFAULT_CLK2_N: IN STD_LOGIC;
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DEFAULT_CLK2_P: IN STD_LOGIC);
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end change_clks;
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