Tubii_Tk2/worklib/change_clks/entity/vhdl.vhd
2015-03-03 16:36:17 -05:00

21 lines
602 B
VHDL

-- generated by newgenasym Tue Mar 03 16:31:26 2015
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity change_clks is
port (
BCKP_CLK2_N: IN STD_LOGIC;
BCKP_CLK2_P: IN STD_LOGIC;
BCKP_CLK3_N: IN STD_LOGIC;
BCKP_CLK3_P: IN STD_LOGIC;
BCKP_USED: OUT STD_LOGIC;
CHANGE_CLK_N: IN STD_LOGIC;
CHANGE_CLK_P: IN STD_LOGIC;
CLK100_N: OUT STD_LOGIC;
CLK100_P: OUT STD_LOGIC;
CLK100_TTL: OUT STD_LOGIC;
DEFAULT_CLK2_N: IN STD_LOGIC;
DEFAULT_CLK2_P: IN STD_LOGIC);
end change_clks;