21 lines
681 B
VHDL
21 lines
681 B
VHDL
-- generated by newgenasym Thu Mar 05 19:38:55 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity ellie_coms is
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port (
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SMELLIE_DELAY_OUT: OUT STD_LOGIC;
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SMELLIE_DELAY_OUT_TTL: IN STD_LOGIC;
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SMELLIE_PRE_DELAY_ECL: IN STD_LOGIC;
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SMELLIE_PRE_DELAY_TTL: OUT STD_LOGIC;
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SMELLIE_PULSE: IN STD_LOGIC;
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SMELLIE_PULSE_OUT: OUT STD_LOGIC;
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TELLIE_DELAY_OUT: OUT STD_LOGIC;
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TELLIE_DELAY_OUT_TTL: IN STD_LOGIC;
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TELLIE_PRE_DELAY_ECL: IN STD_LOGIC;
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TELLIE_PRE_DELAY_TTL: OUT STD_LOGIC;
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TELLIE_PULSE: IN STD_LOGIC;
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TELLIE_PULSE_OUT: OUT STD_LOGIC);
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end ellie_coms;
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