29 lines
681 B
Verilog
29 lines
681 B
Verilog
// generated by newgenasym Tue Mar 03 15:29:31 2015
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module fault_detection (bckp_clk, bckp_clk2_n, bckp_clk2_p, bckp_clk3_n,
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bckp_clk3_p, change_clk_n, change_clk_p, clk_reset_ecl,
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clk_reset_ttl, data_rdy, default_clk, default_clk2_n,
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default_clk2_p, max_count);
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input bckp_clk;
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output bckp_clk2_n;
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output bckp_clk2_p;
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output bckp_clk3_n;
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output bckp_clk3_p;
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output change_clk_n;
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output change_clk_p;
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input clk_reset_ecl;
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input clk_reset_ttl;
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input data_rdy;
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input default_clk;
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output default_clk2_n;
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output default_clk2_p;
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input [0:7] max_count;
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initial
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begin
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end
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endmodule
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