36 lines
1.2 KiB
VHDL
36 lines
1.2 KiB
VHDL
-- generated by newgenasym Thu Mar 05 15:15:57 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity general_utilities is
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port (
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CLK: IN STD_LOGIC;
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DATA: IN STD_LOGIC;
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ECL_TO_LVDS_IN: IN STD_LOGIC;
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ECL_TO_LVDS_OUT_N: OUT STD_LOGIC;
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ECL_TO_LVDS_OUT_P: OUT STD_LOGIC;
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ECL_TO_NIM_IN: IN STD_LOGIC;
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ECL_TO_NIM_OUT: OUT STD_LOGIC;
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ECL_TO_TTL_IN: IN STD_LOGIC;
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ECL_TO_TTL_OUT: OUT STD_LOGIC;
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GENERIC_DELAY_IN: IN STD_LOGIC;
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GENERIC_DELAY_OUT: OUT STD_LOGIC;
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GENERIC_PULSE_IN: IN STD_LOGIC;
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GENERIC_PULSE_OUT: OUT STD_LOGIC;
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LE: IN STD_LOGIC;
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LVDS_TO_ECL_IN_N: IN STD_LOGIC;
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LVDS_TO_ECL_IN_P: IN STD_LOGIC;
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LVDS_TO_ECL_OUT: OUT STD_LOGIC;
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NIM_TO_ECL_IN: IN STD_LOGIC;
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NIM_TO_ECL_OUT: OUT STD_LOGIC;
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PULSE_INV_IN: IN STD_LOGIC;
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PULSE_INV_OUT: OUT STD_LOGIC;
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RIBBON_PULSE_IN_N: IN STD_LOGIC;
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RIBBON_PULSE_IN_P: IN STD_LOGIC;
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RIBBON_PULSE_OUT_N: OUT STD_LOGIC;
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RIBBON_PULSE_OUT_P: OUT STD_LOGIC;
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TTL_TO_ECL_IN: IN STD_LOGIC;
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TTL_TO_ECL_OUT: OUT STD_LOGIC);
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end general_utilities;
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