45 lines
1.8 KiB
CSS
45 lines
1.8 KiB
CSS
C 400 -200 "DDGT_N" 420 -223 0 1 47 0 L
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X "VHDL_MODE" "OUT" 420 -267 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "DDGT_N" 340 -223 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 400 -100 "DDGT_P" 420 -123 0 1 47 0 L
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X "VHDL_MODE" "OUT" 420 -167 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "DDGT_P" 340 -123 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 400 100 "DGT_N" 420 77 0 1 47 0 L
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X "VHDL_MODE" "OUT" 420 33 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "DGT_N" 340 77 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 400 200 "DGT_P" 420 177 0 1 47 0 L
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X "VHDL_MODE" "OUT" 420 133 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "DGT_P" 340 177 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -450 100 "GT_TTL" -470 77 0 1 47 0 R
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X "VHDL_MODE" "IN" -470 33 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "GT_TTL" -390 77 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -450 -50 "DATA" -470 -73 0 1 47 0 R
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X "VHDL_MODE" "IN" -470 -117 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "DATA" -390 -73 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -450 -150 "CLK" -470 -173 0 1 47 0 R
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X "VHDL_MODE" "IN" -470 -217 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "CLK" -390 -173 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -450 -250 "LE" -470 -273 0 1 47 0 R
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X "VHDL_MODE" "IN" -470 -317 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "LE" -390 -273 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 400 0 "DGT2" 420 -23 0 1 47 0 L
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X "VHDL_MODE" "OUT" 420 -67 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "DGT2" 340 -23 0.00 0.00 47 0 0 2 0 0 1 0 99
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L 400 0 350 0 -1 16
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L 350 450 350 -300 -1 16
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L -400 450 -400 -300 -1 16
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L -400 350 350 350 -1 16
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L -450 100 -400 100 -1 16
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L -450 -250 -400 -250 -1 16
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L -450 -150 -400 -150 -1 16
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L -450 -50 -400 -50 -1 16
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L 400 200 350 200 -1 16
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L 400 -100 350 -100 -1 16
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L 350 450 -400 450 -1 16
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L -400 -300 350 -300 -1 16
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A 375 100 25 0.00 359.91 74
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A 375 -200 25 0.00 359.91 74
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T 0 390 0.00 0.00 47 0 0 1 0 9 0
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GT_DELAYS
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P "BLOCK" "TRUE" 0 10 0.00 0.00 47 0 0 1 0 0 0 0 99
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