Tubii_Tk2/worklib/lo_gen/sch_1/pc.db

53 lines
817 B
Plaintext

-- pcdb file, Rev:1.0 written by Allegro Design Entry HDL 16.6-p007 (v16-6-112F) 10/10/2012 on Sun Mar 08 19:23:12 2015
#ISCELL
misc penn#20b#20size#20page *
*
#CELL
tubii_tk2_lib gt_delays *
page1_i1
#ISCELL
standard inport *
page1_i10
#CELL
resistors rsmd0805 *
page1_i11
#CELL
misc testpoint_l *
page1_i12
#ISCELL
standard outport *
page1_i13
#ISCELL
standard outport *
page1_i14
#ISCELL
standard outport *
page1_i15
#ISCELL
standard outport *
page1_i16
#CELL
tubii_tk2_lib select_lo_src *
page1_i2
#ISCELL
standard outport *
page1_i3
#ISCELL
standard outport *
page1_i4
#ISCELL
standard inport *
page1_i5
#ISCELL
standard inport *
page1_i6
#ISCELL
standard inport *
page1_i7
#ISCELL
standard inport *
page1_i8
#ISCELL
standard inport *
page1_i9