149 lines
6.9 KiB
CSS
149 lines
6.9 KiB
CSS
C -700 -575 "UNNUSED_MZ<0..15>" -720 -598 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 -642 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "UNNUSED_MZ<0..15>" -640 -598 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 700 -1050 "MTCA_MIMIC_TRIG2" 720 -1073 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 -1117 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "MTCA_MIMIC_TRIG2" 640 -1073 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 -975 "MTCA_MIMIC_TRIG1" 720 -998 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 -1042 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "MTCA_MIMIC_TRIG1" 640 -998 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -700 750 "BCKP_CLK_IN_USE" -720 727 0 1 47 0 R
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X "VHDL_MODE" "IN" -720 683 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "BCKP_CLK_IN_USE" -640 727 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 650 "SMELLIE_DELAY" -720 627 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 583 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "SMELLIE_DELAY" -640 627 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 575 "TELLIE_DELAY" -720 552 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 508 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "TELLIE_DELAY" -640 552 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 500 "SMELLIE_PULSE" -720 477 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 433 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "SMELLIE_PULSE" -640 477 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 425 "TELLIE_PULSE" -720 402 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 358 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "TELLIE_PULSE" -640 402 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 700 -900 "SCALER<4..6>" 720 -923 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -967 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "SCALER<4..6>" 640 -923 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 225 "GT" 720 202 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 158 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "GT" 640 202 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 275 "SYNC" 720 252 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 208 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "SYNC" 640 252 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 325 "SYNC24" 720 302 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 258 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "SYNC24" 640 302 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 600 "TELLIE_PRE_DELAY" 720 577 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 533 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "TELLIE_PRE_DELAY" 640 577 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 700 "SMELLIE_PRE_DELAY" 720 677 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 633 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "SMELLIE_PRE_DELAY" 640 677 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -700 875 "CLOCKS_DATA_RDY" -720 852 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 808 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "CLOCKS_DATA_RDY" -640 852 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 -950 "MTCA_MIMIC_DATA_RDY" -720 -973 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 -1017 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "MTCA_MIMIC_DATA_RDY" -640 -973 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 700 75 "CAEN_DATA_RDY" 720 52 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 8 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "CAEN_DATA_RDY" 640 52 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 -775 "CLK" 720 -798 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -842 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "CLK" 640 -798 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 -675 "DATA" 720 -698 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -742 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "DATA" 640 -698 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -700 950 "GENERIC_PULSE" -720 927 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 883 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "GENERIC_PULSE" -640 927 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 1025 "GENERIC_DELAY_OUT" -720 1002 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 958 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "GENERIC_DELAY_OUT" -640 1002 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 1075 "GENERIC_DELAY_IN" -720 1052 0 1 47 0 R
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X "VHDL_MODE" "IN" -720 1008 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "GENERIC_DELAY_IN" -640 1052 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 700 25 "LE<0>" 720 2 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -42 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "LE<0>" 640 2 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 -75 "LE<1>" 720 -98 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -142 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "LE<1>" 640 -98 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 -200 "LE<2>" 720 -223 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -267 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "LE<2>" 640 -223 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -700 -850 "SPKR" -720 -873 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 -917 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "SPKR" -640 -873 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 700 1075 "CNTRL_RDY" 720 1052 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 1008 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "CNTRL_RDY" 640 1052 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 975 "CNTRL_REG_CHK" 720 952 0 1 47 0 L
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X "VHDL_MODE" "IN" 720 908 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "CNTRL_REG_CHK" 640 952 0.00 0.00 47 0 0 2 0 0 1 0 99
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C 700 875 "READ_CNTRL_REG_BIT" 720 852 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 808 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "READ_CNTRL_REG_BIT" 640 852 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -700 825 "CLK100_IN" -720 802 0 1 47 0 R
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X "VHDL_MODE" "IN" -720 758 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "CLK100_IN" -640 802 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 -775 "EXT_TRIG<0..15>" -720 -798 0 1 47 0 R
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X "VHDL_MODE" "IN" -720 -842 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "EXT_TRIG<0..15>" -640 -798 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 -675 "TUBII_RT_OUT" -720 -698 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 -742 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "TUBII_RT_OUT" -640 -698 0.00 0.00 47 0 0 0 0 0 1 0 99
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C -700 700 "RESET_CLK" -720 677 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 633 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "RESET_CLK" -640 677 0.00 0.00 47 0 0 0 0 0 1 0 99
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C 700 -600 "MUX_ENABLE" 720 -623 0 1 47 0 L
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X "VHDL_MODE" "OUT" 720 -667 0.00 0.00 47 0 0 0 0 0 1 0 99
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X "PIN_TEXT" "MUX_ENABLE" 640 -623 0.00 0.00 47 0 0 2 0 0 1 0 99
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C -700 -1050 "VCC_IO_EN" -720 -1073 0 1 47 0 R
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X "VHDL_MODE" "OUT" -720 -1117 0.00 0.00 47 0 0 2 0 0 1 0 99
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X "PIN_TEXT" "VCC_IO_EN" -640 -1073 0.00 0.00 47 0 0 0 0 0 1 0 99
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L -700 -1050 -650 -1050 -1 16
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L -650 -1100 -650 1250 -1 16
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L 650 1250 650 -1100 -1 16
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L 700 1075 650 1075 -1 16
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L 700 875 650 875 -1 16
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L 700 975 650 975 -1 16
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L 700 700 650 700 -1 16
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L 700 600 650 600 -1 16
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L 700 325 650 325 -1 16
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L 700 275 650 275 -1 16
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L 700 25 650 25 -1 16
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L 700 75 650 75 -1 16
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L 700 225 650 225 -1 16
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L 700 -200 650 -200 -1 16
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L 700 -75 650 -75 -1 16
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L 700 -675 650 -675 -1 16
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L 700 -600 650 -600 -1 16
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L 700 -775 650 -775 -1 16
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L 700 -900 650 -900 -1 16
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L 700 -975 650 -975 -1 16
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L 700 -1050 650 -1050 -1 16
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L -650 1150 650 1150 -1 16
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L -700 1075 -650 1075 -1 16
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L -700 1025 -650 1025 -1 16
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L -700 825 -650 825 -1 16
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L -700 950 -650 950 -1 16
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L -700 875 -650 875 -1 16
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L -700 700 -650 700 -1 16
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L -700 650 -650 650 -1 16
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L -700 750 -650 750 -1 16
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L -700 575 -650 575 -1 16
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L -700 425 -650 425 -1 16
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L -700 500 -650 500 -1 16
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L -700 -675 -650 -675 -1 16
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L -700 -575 -650 -575 -1 16
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L -700 -775 -650 -775 -1 16
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L -700 -850 -650 -850 -1 16
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L -700 -950 -650 -950 -1 16
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L -650 -1100 650 -1100 -1 16
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L 650 1250 -650 1250 -1 16
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T 0 1190 0.00 0.00 47 0 0 1 0 15 0
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MICROZED_MODULE
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P "BLOCK" "TRUE" 0 10 0.00 0.00 47 0 0 1 0 0 0 0 99
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