10 lines
191 B
VHDL
10 lines
191 B
VHDL
-- generated by newgenasym Thu May 28 15:41:42 2015
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity power is
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port (
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VCC_IO_EN: IN STD_LOGIC);
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end power;
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